Principal Engineer, Design Verification Engineering

1 day ago


Bangalore, India Mulya Technologies Full time

Principal Design Verification Engineer - CXL / PCIe Bangalore Top40 Semiconductor Organization in the world We are seeking talented Design Verification Engineers with proven expertise in industry-standard protocols such as PCIe, Ethernet and CXL. You will play a key role in the functional verification of designs, from developing block-level and system-level verification plans to writing test sequences, executing tests, and collecting and closing coverage. Utilize coding and protocol expertise to contribute to functional verification. · Write assertions, cover properties, and analyze coverage data. · Create VIP abstraction layers for sequences to simplify and scale verification deployments. Minimum of 10-18 years’ experience in supporting or developing complex SoC/silicon products for server, storage, and/or networking applications. · Strong academic and technical background in Electrical Engineering or Computer Engineering (bachelor’s degree required, master’s preferred). · Required Experience: · Experience using Verification IPs from third-party vendors for PCIe/CXL, focusing on Gen3 or above. · Experience writing assertions, cover properties, and analyzing coverage data. · Developing VIP abstraction layers for sequences to simplify and scale verification deployments. Preferred Experience: · Experience with buffering and queuing with QoS on complex NOC-based SoCs. · Analyzing performance at the system level on switching fabrics.



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