Current jobs related to Lead sta engineer - Karnataka - ACL Digital
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Lead STA Engineer
5 days ago
Karnataka, India ACL Digital Full timeTechnical Skills: Position: STA Lead Engineers Work Location: Bangalore and Hyderabad Experience: 5+years Well versed with the timing closure (STA), timing closure methodologies. Pre/Post-layout constraint development to timing closure. Handshake with the design team and develop functional/DFT constraints. IP level constraint integration....
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Lead STA Engineer
6 days ago
Karnataka, India ACL Digital Full timeTechnical Skills:Position: STA Lead EngineersWork Location: Bangalore and HyderabadExperience: 5+yearsWell versed with the timing closure (STA), timing closure methodologies.Pre/Post-layout constraint development to timing closure.Handshake with the design team and develop functional/DFT constraints.IP level constraint integration.Multi-voltage/Switching...
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Lead STA Engineer
19 hours ago
karnataka, India ACL Digital Full timeTechnical Skills:Position: STA Lead EngineersWork Location: Bangalore and HyderabadExperience: 5+yearsWell versed with the timing closure (STA), timing closure methodologies.Pre/Post-layout constraint development to timing closure.Handshake with the design team and develop functional/DFT constraints.IP level constraint integration.Multi-voltage/Switching...
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Lead STA Engineer
7 days ago
karnataka, india, india ACL Digital Full timeTechnical Skills: Position: STA Lead Engineers Work Location: Bangalore and Hyderabad Experience: 5+years Well versed with the timing closure (STA), timing closure methodologies. Pre/Post-layout constraint development to timing closure. Handshake with the design team and develop functional/DFT constraints. IP level constraint integration....
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Lead STA Engineer
7 days ago
karnataka, india, india ACL Digital Full timeTechnical Skills: Position: STA Lead Engineers Work Location: Bangalore and Hyderabad Experience: 5+years Well versed with the timing closure (STA), timing closure methodologies. Pre/Post-layout constraint development to timing closure. Handshake with the design team and develop functional/DFT constraints. IP level constraint integration....
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Sta
2 weeks ago
Bengaluru, Karnataka, India Sarvajith Infotech Full timeHi All, Now we are looking for STA role. Experience: - 10+yrs **Salary**: - **Max Budget for each role - 4X** - Very good understanding of timing concepts - Should have a good understanding of SDC and constraints syntax - Work with the design and implementation teams to develop and qualify timing constraints - Experience in Timing Analysis both at block...
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Associate Iii
4 weeks ago
Bengaluru, Karnataka, India UST Global Full time3 - 5 Years - 1 Opening - Bangalore **Role description**: Role Proficiency: Ability to e xecute any small to mid size customer project in any field of VLSI Frontend Backend or Analog design with mínimal supervision Outcomes: - Work as an individual contributor to own any one task of RTL Design/Module and provide support to junior engineers in...
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Lead Physical Design Engineer
6 days ago
Karnataka, India ACL Digital Full timePNR Lead EngineersWork Location: BangaloreExperience: 7+YearsTechnical Skills:Should be able to handle Full chip PnR (timing/congestion/CTS issues), understanding of IO ring, package support, multi voltage designDeep understanding of the concepts related to synthesis, place & route, CTS, timing convergence, IR/EM checks and signoff DRC/LVS closureResponsible...
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Lead Physical Design Engineer
5 days ago
Karnataka, India ACL Digital Full timePNR Lead Engineers Work Location: Bangalore Experience: 7+Years Technical Skills: Should be able to handle Full chip PnR (timing/congestion/CTS issues), understanding of IO ring, package support, multi voltage design Deep understanding of the concepts related to synthesis, place & route, CTS, timing convergence, IR/EM checks and signoff DRC/LVS closure...
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Lead Physical Design Engineer
6 days ago
karnataka, karnataka, in ACL Digital Full timePNR Lead EngineersWork Location: BangaloreExperience: 7+YearsTechnical Skills:Should be able to handle Full chip PnR (timing/congestion/CTS issues), understanding of IO ring, package support, multi voltage designDeep understanding of the concepts related to synthesis, place & route, CTS, timing convergence, IR/EM checks and signoff DRC/LVS closureResponsible...
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Co-op/ Intern
3 weeks ago
Bengaluru, Karnataka, India Advanced Micro Devices, Inc Full timeOverview: **WHAT YOU DO AT AMD CHANGES EVERYTHING** We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences - the building blocks for the data center, artificial intelligence, PCs, gaming and embedded....
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Associate Iii
4 weeks ago
Bengaluru, Karnataka, India UST Global Full time3 - 5 Years - 2 Openings - Bangalore **Role description**: Role Proficiency: Ability to e xecute any small to mid size customer project in any field of VLSI Frontend Backend or Analog design with mínimal supervision Outcomes: - Work as an individual contributor to own any one task of RTL Design/Module and provide support to junior engineers in...
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Associate Iii
4 weeks ago
Bengaluru, Karnataka, India UST Global Full time3 - 5 Years - 2 Openings - Bangalore **Role description**: Role Proficiency: Ability to e xecute any small to mid size customer project in any field of VLSI Frontend Backend or Analog design with mínimal supervision Outcomes: - Work as an individual contributor to own any one task of RTL Design/Module and provide support to junior engineers in...
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Associate Iii
4 weeks ago
Bengaluru, Karnataka, India UST Global Full time3 - 5 Years - 1 Opening - Bangalore **Role description**: Role Proficiency: Ability to e xecute any small to mid size customer project in any field of VLSI Frontend Backend or Analog design with mínimal supervision Outcomes: - Work as an individual contributor to own any one task of RTL Design/Module and provide support to junior engineers in...
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Associate Iii
1 week ago
Bengaluru, Karnataka, India UST Global Full time3 - 5 Years - 3 Openings - Bangalore **Role description**: Role Proficiency: Ability to e xecute any small to mid size customer project in any field of VLSI Frontend Backend or Analog design with mínimal supervision Outcomes: - Work as an individual contributor to own any one task of RTL Design/Module and provide support to junior engineers in...
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Associate Ii
4 weeks ago
Bengaluru, Karnataka, India UST Global Full time2 - 3 Years- 1 Opening- Bangalore**Role description**: Role Proficiency: Execute any internal project or small tasks of customer project in any field of VLSI Frontend Backend or Analog design under mínimal supervison from the Lead Outcomes: - As an Individual contributor work on any one task of RTL Design/Module in Verification/PD/DFT/Circuit...
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Associate Ii
4 weeks ago
Bengaluru, Karnataka, India UST Global Full time2 - 3 Years - 1 Opening - Bangalore **Role description**: Role Proficiency: Execute any internal project or small tasks of customer project in any field of VLSI Frontend Backend or Analog design under mínimal supervison from the Lead Outcomes: - As an Individual contributor work on any one task of RTL Design/Module in Verification/PD/DFT/Circuit...
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Associate Ii
4 weeks ago
Bengaluru, Karnataka, India UST Global Full time2 - 3 Years - 1 Opening - Bangalore **Role description**: Role Proficiency: Execute any internal project or small tasks of customer project in any field of VLSI Frontend Backend or Analog design under mínimal supervison from the Lead Outcomes: - As an Individual contributor work on any one task of RTL Design/Module in Verification/PD/DFT/Circuit...
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Associate Iii
4 weeks ago
Bengaluru, Karnataka, India UST Global Full time3 - 5 Years - 1 Opening - Bangalore **Role description**: Role Proficiency: Ability to e xecute any small to mid size customer project in any field of VLSI Frontend Backend or Analog design with mínimal supervision Outcomes: - Work as an individual contributor to own any one task of RTL Design/Module and provide support to junior engineers in...
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Staff Verification with a Some Rtl Experience
2 weeks ago
Bengaluru, Karnataka, India Quest Global Full time**Job Requirements **A new program started, it requires and RTL engineer with 8+ years of practical design and verification experience using SystemVerilog UVM and ASIC verification. **Work Experience **- Experience with Synopsys and/or Cadence simulation tools. - RTL and possibly Gate level debug Desireable Skills - Experience with Synopsys and/or Cadence...

Lead sta engineer
1 week ago
Technical Skills: Position: STA Lead Engineers Work Location: Bangalore and Hyderabad Experience: 5+years Well versed with the timing closure (STA), timing closure methodologies. Pre/Post-layout constraint development to timing closure. Handshake with the design team and develop functional/DFT constraints. IP level constraint integration. Multi-voltage/Switching aware corner definitions. RC/C model selection understanding. Abstraction expertise like Hyperscale/ILM/ETM. RC Balancing and scaling analysis of full chip clock. RC Balancing and scaling analysis of critical data paths. Good automation skills in PERL, TCL and EDA tool-specific scripting. chip and custom scripts for timing fixes Qualification: BE/BTECH/MTECH in EE/ECE with proven experience in ASIC Physical Design. Detailed knowledge of EDA tools and flows, Tempus/Primetime experience is must. Interested can share CV to