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Digital FPGA Engineer
2 months ago
Responsibilities:
• Develop and optimise RTL code for FPGA applications, ensuring high-performance, low-
latency designs.
• Perform FPGA synthesis, place and route, and timing analysis to meet system requirements.
• Conduct simulation, debugging, and troubleshooting of FPGA designs using tools such as
ModelSim/Vivado/Quartus.
• Manage FPGA resources efficiently to ensure design scalability and optimal resource
utilisation.
• Learning new tools and software processes
• Documentation of Designs and Test Results
Qualifications:
• BTech in ECE/EE/IN or Mtech in VLSI/FPGA related Domains
• 2-3 years of development experience in FPGA is preferred.
• Freshers with hands-on project experience and strong Digital and Verilog fundamentals are
encouraged to apply
Requirements
Mandatory
• Proficiency in Verilog, Familiarity with VHDL, and a solid understanding of digital signal
processing, timing analysis, and FPGA constraints.
• Familiarity with debugging and testing tools like oscilloscopes, logic analysers, and other lab
equipment and Integrated Logic Analyzers of FPGA and JTAG protocols
• Familiarity with serial communication protocols such as UART, SPI, I2C, and Ethernet
Optional
• Familiarity with bus-level protocols like AXI, APB, and AHB.
Benefits:
• Competitive salary with growth opportunities.
• Working with researchers to implement a novel AI accelerator and signal processing
algorithm and publish papers with Researchers
• Freely Attend classes/sessions/seminars, like a regular MTech or a PhD student, at IISc,
related to topics of interest and work
• Opportunity to be a part of startup incubations at IISc.
