Senior FPGA RTL Design Lead
3 weeks ago
Company Overview
Mulya Technologies is a leading provider of advanced protocol validation solutions for testing and validating emerging and mainstream serial bus technologies in System-on-Chip (SoC) designs. With a focus on driving innovation and contributing to industry standards, we offer a comprehensive suite of high and low-speed Protocol Exerciser and Analysis capabilities.
We address protocol validation needs for various technologies including PCIe, UFS, I3C, SPMI, RFFE, eMMC, SD Express, SD, MDIO, QSPI, and more. Our mission is to help our clients maintain a competitive edge in the rapidly evolving semiconductor landscape.
Job Description
This is a full-time on-site role for a Senior Staff FPGA RTL Design Engineer. The successful candidate will be responsible for performing digital signal processing, debugging issues, and designing RTL for complex projects. You will collaborate with cross-functional teams to develop and execute FPGA-based solutions.
Estimated Salary: $140,000 - $180,000 per year
Required Skills and Qualifications
- Expertise in Digital Signal Processing, Signal Processing, and RTL Design
- 8-10+ years experience design Verilog code/ implementing and successfully testing the IP in hardware
- Strong debugging skills and experience in analyzing and resolving issues
- Bachelor's or Master's degree in Electrical Engineering or a related field
- Experience with FPGA development tools and methodologies
- Knowledge of industry standards and protocols such as PCIe, UFS, I3C, SPMI, RFFE
- Ability to work effectively in a team environment
- Excellent problem-solving and communication skills
- Experience in the semiconductor industry is a plus
- Must have hands-on experience with FPGA debugging tools and test & measurement instruments such as oscilloscope and Logic Analyzer
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