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bangalore, India Tata Consultancy Services Full timeGreetings From TCS !!!Role: Physical DesignLocation: BangaloreExperience Range: 5 + YearsMust-Have:Should have in depth experience in Floor-planning, CTS, Power routing, place and route, timing closure, DRC and LVSShould have worked on the latest technology nodes (14nm or 2nm to 5nm)Must have experience in Static timing analysisMust have experience in...
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Physical Design Engineer
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bangalore, India Tata Consultancy Services Full timeGreetings From TCS !!!Role: Physical DesignLocation: BangaloreExperience Range: 5 + YearsMust-Have:Should have in depth experience in Floor-planning, CTS, Power routing, place and route, timing closure, DRC and LVSShould have worked on the latest technology nodes (14nm or 2nm to 5nm)Must have experience in Static timing analysisMust have experience in...
Physical design engineer
2 months ago
Know anyone who might be interested? Wipro has been providing semiconductor engineering services to the world’s leading companies for over 30 years.
#Wipro currently works with 80 percent of the world’s top #semiconductors/ Experience : Min 7 - 18 Years.
Location : Bangalore / Hyderabad In-depth knowledge and hands-on experience on Netlist2 GDSII Implementation i.e.
Floor planning, Placement, CTS, Routing, STA, Power Integrity Analysis, Physical Verification.
· Should have experience on Physical Design Methodologies and sub-micron technology of 28nm and lower technology nodes.
· Should have experience on programming in Tcl/Tk/Perl.
· Must have hands-on experience on Synopsys/Cadence tools.
(Innovus, ICC2, Primetime, PT-PX, Calibre).
· Well versed with timing constraints, STA and timing closure.
· Inspirational leadership style, good communication skills, and ability to work in a global environment In-depth knowledge and hands-on experience on Netlist2 GDSII Implementation i.e.
Floor planning, Placement, CTS, Routing, STA, Power Integrity Analysis, Physical Verification · Should have experience on Physical Design Methodologies and sub-micron technology of 28nm and lower technology nodes.
· Should have experience on programming in Tcl/Tk/Perl · Well versed with timing constraints, STA and timing closure.
· Inspirational leadership style, good communication skills, and ability to work in a global environment.
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