Memory Layout Engineer

1 week ago

Bangalore, India 7Rays Semiconductors Full time

Experience in layout design of leaf cell level and top level (integration) of custom memories example SRAM and Register Files

Work closely with circuit designers to understand schematics and translate them into optimized layouts.

Good understanding of Floor-planning, placement, matching, routing, parasitics and layout constraints.

Good understanding and debugging of physical verification checks DRC, LVS, ERC and reliability check EM and IR.

Good understanding of advanced process nodes 5nm and below.

Preferably with scripting experience in SKILL, Python, or TCL.

Required Skill Set Experience in Custom based memories OR compiler-based memories

Exposure to high-performance and/or low-power memory layout optimization techniques. Experience in Years Minimum of 5 plus years of experience in memory layout design

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