Formal Verification Engineer

2 days ago


Hyderabad, India BITSILICA Full time

Formal Verification

• Bachelor's or Master's Degree in Electrical/Electronics

• 6+ years of hands-on experience in Formal Verification, developing and implementing formal verification environments

• Implement and improve functional verification in semiconductor IP and design blocks.

• Develop test plans and verification methodologies to verify the microarchitecture and design

• Strong understanding of Formal Verification using SystemVerilog Assertions.

• Experience in logic and SoC Verification from planning to closure

• Good understanding of verification flows and tools especially Formal Verification tools.

• Experience in at least one industry-standard formal verification tool (such as Cadence Jasper Gold, Synopsys VC Formal, or Siemens Questa Formal)

• Demonstrated expertise in Digital Logic Design and Computer Architecture

• Excellent problem-solving skills and ability to work in a team environment

• Prior hands-on work experience in Control and Data Path verification using FV

• Excellent verbal and written communication skills.

• An ability to interact with customers to understand their requirements and deliver high-quality code is expected.



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