Memory layout engineer

4 days ago


Bengaluru, India ADROITEC SYSTEMS PVT LTD Full time
Role: Layout Design of SRAM/CAM/RF custom/compiler memories in 5 FF/3 FF technologies.
Responsibilities:
Development of key building blocks of memory architecture such as Row Decoder, IO, Control.
Skilled in pitched layout concepts, floor planning for Placement, Power and Global Routing. Knowledge of EM/IR requirements.
level integration, final verification of Compiler/Custom memories.
Should possess good knowledge on CMOS fabrication process, foundries and challenges in latest technology nodes.
Skills :
Well experienced in using industry standard EDA tools like Cadence Virtuoso, Mentor Graphics Caliber etc.
Good problem solving and logical reasoning skills.
Good communication skills required.
Experience: Above 3 to 7 years
Location:  Bangalore
Interested candidates share their resumes to below mentioned mail id:


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