Physical design engineer

e Infochips (An Arrow Company) Hiring Physical Design Engineer Experience - 4+ Years Location- Bangalore/Hyderabad/Ahmedabad/Noida/Chennai Job description is as below: * Block level Physical Design Implementation from RTL to GDSII or Netlist to GDSII, * Block level Physical Signoff, * Block level Timing Signoff and ECO generation. * Block level...

JOB DESCRIPTION, ROLE & RESPONSIBILITES POSITION TITLE: Senior Engineer/Engineer – Physical Design LOCATION: Noida/ Bangalore/ Hyderabad/ Ahmedabad ROLE & RESPONSIBILITIES • Engineer will be responsible for floor-planning, timing constraints, physical synthesis, formal verification, clock tree optimization, routing, extraction, timing closure, DFT,...

eInfochips (An Arrow Company) Hiring Physical Design Engineer Experience - 4+ Years Location- Bangalore/Hyderabad/Ahmedabad/Noida/Chennai Job description is as below: * Block level Physical Design Implementation from RTL to GDSII or Netlist to GDSII, * Block level Physical Signoff, * Block level Timing Signoff and ECO generation. * Block level...

eInfochips (An Arrow Company) Hiring Physical Design EngineerExperience - 4+ YearsLocation- Bangalore/Hyderabad/Ahmedabad/Noida/Chennai>Job description is as below: Block level Physical Design Implementation from RTL to GDSII or Netlist to GDSII, Block level Physical Signoff, Block level Timing Signoff and ECO generation. Block level Power signoff. Good...

We need an Physical Design Methodology Engineer to join our ATD team. The candidate should have a strong background in back-end design of ASIC/SoC chips. The ideal candidate will have a bachelor’s or master’s degree in Electrical Engineering or a related field.Requirements1 - 2 Years of experience in physical designBachelor’s or master’s degree in...

Greetings From TCS !!! Role: Physical Design Location: Bangalore Experience Range: 5+ Years Must-Have: Should have in depth experience in Floor-planning, CTS, Power routing, place and route, timing closure, DRC and LVS Should have worked on the latest technology nodes (14nm or 2nm to 5nm) Must have experience in Static timing analysis ...

Hi, Thrilled to announce that Tessolve is hiring for below positions. Position: Sr Design Engineer 1 / Sr Design Engineer 2 / Design Lead / Sr Design Lead Experience: 4-11 years relevant experience. Location – Bangalore Tessolve Semiconductors a venture of Hero Electronix, part of $5 B Hero Group companies a Design and Test Engineering Service...

Hello, We are seeking a skilled and experienced Physical Design Engineer to join our team. The ideal candidate will have a strong background in Physical Design and hands-on experience with industry-standard tools for Physical Design. If you are passionate about electronics and enjoy working in a dynamic and innovative environment, we would love to hear...

JOB DESCRIPTION, ROLE & RESPONSIBILITESPOSITION TITLE: Senior Engineer/Engineer – Physical DesignLOCATION: Noida/ Bangalore/ Hyderabad/ AhmedabadROLE & RESPONSIBILITIES• Engineer will be responsible for floor-planning, timing constraints, physical synthesis, formal verification, clock tree optimization, routing, extraction, timing closure, DFT, Antenna...

Job Role: Physical Design Engineer- Senior/Lead Location: Bangalore, Hyderabad, Noida and Ahmedabad Experience Required: 5+ ROLE & RESPONSIBILITIES Engineer will be responsible for floor-planning, timing constraints, physical synthesis, formal verification, clock tree optimization, routing, extraction, timing closure, DFT, Antenna fixing &signal...

Senior Physical Design Engineer: Exp-8+yrs KEY RESPONSIBILITIES: Lead the team responsible for Synthesis, Physical Design, timing and Physical closure Manage a large team of internal and external resources Responsible for ensuring the completion of the SOC chip on schedule with high QOR Physical implementation of block level and subsystem...

Senior Physical Design Engineer: Exp-8+yrs KEY RESPONSIBILITIES: Lead the team responsible for Synthesis, Physical Design, timing and Physical closure Manage a large team of internal and external resources Responsible for ensuring the completion of the SOC chip on schedule with high QOR Physical implementation of block level and subsystem level Contribute to...

Job Role: Physical Design Engineer- Senior/Lead Location: Bangalore, Hyderabad, Noida and Ahmedabad Experience Required: 5+ ROLE & RESPONSIBILITIES Engineer will be responsible for floor-planning, timing constraints, physical synthesis, formal verification, clock tree optimization, routing, extraction, timing closure, DFT, Antenna fixing &signal...

Senior Physical Design Engineer: Exp-8+yrs KEY RESPONSIBILITIES: Lead the team responsible for Synthesis, Physical Design, timing and Physical closure Manage a large team of internal and external resources Responsible for ensuring the completion of the SOC chip on schedule with high QOR Physical implementation of block level and subsystem...

Hi Folks, We are hiring for Physical Desing Engineer Experience - 5+ Location- Bangalore/ Kochi/ Ahmedabad / Vizag JD RTL to GDS including, Synthesis + PNR • Fusion compiler / Cadence flow (Innovus) • Good understanding Macro placement, Floorplanning, placement CTS, Routing • Design planning (partitioning, bump planning & Routing) • Very...

Hi,Thrilled to announce that Tessolve is hiring for below positions.Position: Sr Design Engineer 1 / Sr Design Engineer 2 / Design Lead / Sr Design LeadExperience: 4-11 years relevant experience.Location – BangaloreTessolve Semiconductors a venture of Hero Electronix, part of $5B Hero Group companies a Design and Test Engineering Service Company providing...

Minimum 15+ Years of experience So C Physical Design. Skills – have working experience in advanced Fin FET node designs 7nm/5nm/3nm. Experience with Cadence/Synopsys Pn R/STA tools and Calibre; good scripting/automation skills is a must. This position is for a senior-level physical design engineer who will work on Floor planning/Bump Planning/ Pin...

Minimum 15+ Years of experience SoC Physical Design. Skills – have working experience in advanced FinFET node designs 7nm/5nm/3nm. Experience with Cadence/Synopsys PnR/STA tools and Calibre; good scripting/automation skills is a must. This position is for a senior-level physical design engineer who will work on Floor planning/Bump Planning/ Pin...

L&T Technologies (LTTS) is looking for Physical Design Engineers (PnR)with 4.5+ Years of experience. Job Location : Bangalore Please find the detailed job description below :: • IP/Block level PnR activities from Netlist to GDS-II. • Good knowledge of all PnR activities like Floor-planning, Placement, CTS, Routing, Timing closure(STA), signoff checks...

PNR Lead Engineers Work Location: Bangalore Experience: 7+Years Technical Skills: Should be able to handle Full chip PnR (timing/congestion/CTS issues), understanding of IO ring, package support, multi voltage design Deep understanding of the concepts related to synthesis, place & route, CTS, timing convergence, IR/EM checks and signoff DRC/LVS...