QpiAI | Cryogenic RF/Analog IC Design Engineer | bangalore

6 days ago

bangalore, India QpiAI Full time
About QpiAI
QPiAI is one of the first quantum computing company from India. At QpiAI, we aim towards
designing the full quantum computing stack along with integrating it with special-purpose
optimization hardware and GPU accelerators. More information about us can be found at:
Quantum hardware team is responsible for designing the Cryogenic Quantum Control Circuits, RF Control Hardware and QpiAI ASGP. As a Cryogenic IC Design and characterisation, you would be involved with designing the Analog/RF frontend for qubits control and readout that would operate at extreme low temperatures (~4 Kelvin).
Job Description
Role offers opportunity to work in scalable quantum hardware for a full-stack quantum computer As a Cryogenic IC Design and characterisation engineer, you would be involved with designing the analog frontend for qubits control and readout that would operate at extreme low temperatures (~4 Kelvin).
Requirements
Master’s degree/PhD in Electronics/Applied Physics with 2 years’ work experience and domain
experience in cryogenic CMOS Analog/RF IC design and characterization.
● Experience in CMOS device modeling at room temperature or cryogenic temperature Kelvin at least one of the technology nodes 65nm/40nm/22nm.
● Experience working with foundry PDK teams for developing device structures for diodes,
MOS/BJT transistors (all corners), passives (Inductor, capacitors, resistors) in
65nm/40nm/22nm technology nodes for building cryogenic PDK.
● Expertise in designing and simulating analog/RF frontend blocks such as LNAs, TIAs,
mixers, LOs, ADCs, DACs in 65nm/40nm/22nm technology nodes.
● Experience in Worst case analysis, top-level simulation, Monte-Carlo simulation and design
optimization.
● Expertise in Layout and post layout verification of the block (standalone and integrated with
signal chain).
● Proven experience with successful tape outs in analog RF signal chain components such as
LNAs, TIAs, mixers, LOs, ADCs, DACs in at least one of the technology nodes
65nm/40nm/22nm.
● Experience (min 1 year) in device characterisation by DC, CV and RF(S parameters and
noise measurement) techniques and extracting BSIM4/4.5 models for 40nm/28nm/22nm
technology nodes.
● Experience in PCB design, designing experiment plans and performing cryogenic
characterization of CMOS devices, ADC, DAC, LNA, PLLs at cryogenic temperatures DC, RF (S-parameter and noise measurements).
● Proficiency in EDA (Cadence, Mentor, Synopsis tools) for analog and RF design.
● Should be familiar with Linux system and scripting language with TCL/Python.
● Good problem solving and communication skills.
● Should be a good team player.

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