Sr Verification Principal Design Engineer

Design Verification Engineer - Senior / Lead / Sr. Lead Job Description: Must have good knowledge on the verification flows. Excellent hands-on debug skills and problem solving attitude.. Experience of working in complex test-bench/model in Verilog, System Verilog or SystemC Experience of working on Functional Verification, SoC Verification,...

We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the...

Job Title: Sr Design EngineerKey Responsibilities:We are seeking a skilled verification engineer to lead the development of high-quality IP and SOC verification solutions.The ideal candidate will have extensive experience in using SV/UVM or SOC Verification using C/SV.Familiarity with VIP integration, interconnect protocols, and SOC interfaces is also...

Job Title: Principal Verification SpecialistWe are seeking a skilled and experienced verification engineer to join our team.">Key Responsibilities:Lead the development of high-quality verification environments for complex digital systems, focusing on IP/SOC design.Design and implement testbenches from scratch, leveraging System Verilog and UVM...

Talented and motivated Mid-Level CPU Subsystem Design and Verification Engineer to join our growing team. Responsibilities : Design : Participate in the design of CPU subsystems, collaborating with architects and design engineers. Contribute to micro-architectural decisions, considering performance, power, and area trade-offs. Develop detailed design...

Job Title: Design Verification Engineer Exp Level:4+yrs Location: Bangalore/Hyderabad Job Description: Responsible for ensuring functional correctness of ASIC/SoC designs. Key Task: Develop and execute verification plans for complex digital designs. Methodology: Use UVM/SystemVerilog to create testbenches, write test cases, and debug failures. ...

SoC Verification Engineer (Formal, 6–8 Yrs) Pune/Bengaluru Experienced SoC Verification Engineers with strong expertise in Formal Verification using JasperGold. Experience: 6–8 years Must-Have Skills: JasperGold, SVA, RTL Debug Good to Have: UVM, low-power/security verification

Senior Design verification Engineer Mandatory Skill : PCIE Location : Bangalore Experience : 5 years Design Verification Engineer responsible for ensuring functional correctness of ASIC/SoC designs. Key Task: Develop and execute verification plans for complex digital designs. Methodology: Use UVM/SystemVerilog to create testbenches, write...

Design Verification Engineer - Senior / Lead / Sr. Lead Location: Bangalore / Hyderabad Experience: 4 to 10 Years Required Qualifications: Bachelor’s or Master’s degree in Electrical Engineering , Computer Engineering , or a related field. 4+ years of hands-on experience in design verification of high-speed interfaces such as...

Hi All, ACL Digital is hiring #Senior #Design #Verification Engineer! Experience: 4 Years Location: Bangalore / Hyderabad Notice Period: Immediate to 30 Days Preferred! We're seeking experienced professionals ASIC/SoC verification. If you have expertise in UVM/System Verilog, proficiency in scripting languages like Python/Perl/TCL, and a...