Sr Verification Principal Design Engineer
1 week ago
12-14 yrs of work experiences in VLSI domain with Master’s/bachelor’s degree in engineering Strong expertise in Verilog, HVL(SV, Specman e) with UVM/OVM/eRM methodology Expertise in assertions development/closure, constraint randomization, functional and code coverages, formal verification Expertise in test-bench development Strong RTL and GLS (w/ or w/o SDF) sim debug skills Should be able to manage project schedule and delivery independently Should be good in Perl/Tcl scripting and automation
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Senior Design Verification Architect
5 days ago
Bangalore, India Eximietas Design Full timeEximietas Design Hiring Senior Design Verification Architects/ Sr. Manger. Experience: 8+ Years. Location: Bengaluru or Visakhapatnam or San Jose, Bay Area, & Austin, USA. Anyone with a Valid H1B or Already in US. Job Description: # Lead SoC Design Verification efforts for complex projects, ensuring successful execution of verification plans. # Develop and...
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Sr RTL Principal Design Engineer
4 days ago
bangalore district, India Cadence System Design and Analysis Full timeRTL Design Engineer for Interface Controller IP development team. Position is based in Bangalore or Noida. The role would include design and support of the RTL of the PCIe/CXL/IDE/UALink IP solution of Cadence. The work involved will be working with the existing RTL, addition of new features into the RTL, ensuring various customer configurations are clean as...
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Senior design verification architect
4 weeks ago
Bangalore, India Eximietas Design Full timeEximietas Design Hiring Senior Design Verification Architects/ Sr. Manger. Experience: 10+ Years. Location: Bengaluru or Visakhapatnam or San Jose, Bay Area, & Austin, USA. Anyone with a Valid H1 B or Already in US. Job Description: # Lead So C Design Verification efforts for complex projects, ensuring successful execution of verification plans. # ...
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Senior Design Verification Architect
5 days ago
Bangalore, India Eximietas Design Full timeHi All, Eximietas Design Hiring Senior SoC Design Verification Architects / Sr. Manager. Experience: 10+ Years. Location: Bengaluru or Visakhapatnam or San Jose, Bay Area, & Austin, USA. Anyone with a Valid H1B or Already in US. Job Description: # Lead SoC Design Verification efforts for complex projects, ensuring successful execution of verification plans....
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Senior Design Verification Lead
1 week ago
bangalore district, India Eximietas Design Full timeEximietas Hiring Senior Design Verification Engineers/Leads (PCIE) Experience: 8+ Years. Location: Bengaluru or Visakhapatnam or San Jose, Bay Area, & Austin, USA. Anyone with a Valid H1B or Already in US. Job Description: Lead SoC Design Verification efforts for complex projects, ensuring successful execution of verification plans. Develop and implement...
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Senior Design Verification Architect
6 days ago
bangalore, India Eximietas Design Full timeHi All,Eximietas Design Hiring Senior SoC Design Verification Architects / Sr. Manager.Experience: 10+ Years.Location: Bengaluru or Visakhapatnam or San Jose, Bay Area, & Austin, USA.Anyone with a Valid H1B or Already in US.Job Description:# Lead SoC Design Verification efforts for complex projects, ensuringsuccessful execution of verification plans.#...
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Senior Design Verification Leads/Architects
1 week ago
bangalore district, India Eximietas Design Full timeHi All, Greetings' from Eximietas Design....! We are Hiring Senior SOC Design Verification Leads / Architects. Experience: 10+ Years. Location: Bengaluru or Visakhapatnam or San Jose, Bay Area, & Austin, USA. Anyone with a Valid H1B or Already in US. Job Description: We are seeking an experienced and highly skilled Senior SOC Design Verification Engineer...
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Sr Verification Principal Design Engineer
5 days ago
bangalore, India Cadence System Design and Analysis Full time12-14 yrs of work experiences in VLSI domain with Master’s/bachelor’s degree in engineering Strong expertise in Verilog, HVL(SV, Specman e) with UVM/OVM/eRM methodology Expertise in assertions development/closure, constraint randomization, functional and code coverages, formal verification Expertise in test-bench development Strong RTL and GLS (w/ or w/o...
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Sr Verification Principal Design Engineer
5 days ago
Bangalore, India Cadence System Design and Analysis Full time12-14 yrs of work experiences in VLSI domain with Master’s/bachelor’s degree in engineering Strong expertise in Verilog, HVL(SV, Specman e) with UVM/OVM/eRM methodology Expertise in assertions development/closure, constraint randomization, functional and code coverages, formal verification Expertise in test-bench development Strong RTL and GLS (w/ or w/o...
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Design Verification Engineer
1 week ago
bangalore, India ACL Digital Full timeDesign Verification Engineer - Senior / Lead / Sr. LeadJob Description:Must have good knowledge on the verification flows.Excellent hands-on debug skills and problem solving attitude..Experience of working in complex test-bench/model in Verilog, System Verilog or SystemCExperience of working on Functional Verification, SoC Verification, EmulationGood in...