Verification Architect/ Senior Verification Lead

15+ Years of experience in So C and IP level verification Must have Expertise: 1. Grounds up verification environment development using SV/ UVM is a must 2. One of the high speed protocols like PCIe or USB 3 or MIPI 3. Experience in testplanning, effort and schedule estimation, tracking and technical leadership 4. Proficient in System Verilog and...

15+ Years of experience in SoC and IP level verification Must have Expertise: 1. Grounds up verification environment development using SV/ UVM is a must 2. One of the high speed protocols like PCIe or USB 3 or MIPI 3. Experience in testplanning, effort and schedule estimation, tracking and technical leadership 4. Proficient in System Verilog and UVM 5. ASIC/...

We are seeking an experienced Verification Engineer or Senior Verification Engineer SOC. This position involves extensive hands-on experience with CPU verification using industry-standard functional verification methodologies, formal verification and constrained random generators, and reference model-based checkers. The candidate must be able to take...

We are seeking an experienced Verification Engineer or Senior Verification Engineer SOC. This position involves extensive hands-on experience with CPU verification using industry-standard functional verification methodologies, formal verification and constrained random generators, and reference model-based checkers. The candidate must be able to take...

Qualifications and Skills for DV Positions: Bachelor‘s or Masters degree in Computer Science, Electronics Engineering or equivalent practical experience 7/10+ years of hands-on experience in SystemVerilog/UVM methodology and/or C/C++ based verification 7/ 10+ years experience in IP/sub-system and/or SoC level verification based on SystemVerilog UVM/OVM...

We are seeking an experienced Verification Engineer or Senior Verification Engineer SOC. This position involves extensive hands-on experience with CPU verification using industry-standard functional verification methodologies, formal verification and constrained random generators, and reference model-based checkers. The candidate must be able to take...

We are seeking an experienced Verification Engineer or Senior Verification Engineer SOC. This position involves extensive hands-on experience with CPU verification using industry-standard functional verification methodologies, formal verification and constrained random generators, and reference model-based checkers. The candidate must be able to take...

We are seeking an experienced Verification Engineer or Senior Verification Engineer SOC. This position involves extensive hands-on experience with CPU verification using industry-standard functional verification methodologies, formal verification and constrained random generators, and reference model-based checkers. The candidate must be able to take...

Founded by highly respected Silicon Valley veterans - with its design centers established in Santa Clara, California. / Hyderabad Senior Design Verification Manager Hyderabad ================ Role Overview: As the Senior Design Verification Manager, you will lead the verification team responsible for ensuring that our semiconductor designs meet...

Qualifications and Skills for DV Positions: Bachelor's or Masters degree in Computer Science, Electronics Engineering or equivalent practical experience 7/10+ years of hands-on experience in SystemVerilog/UVM methodology and/or C/C++ based verification 7/ 10+ years experience in IP/sub-system and/or SoC level verification based on SystemVerilog UVM/OVM based...

Qualifications and Skills for DV Positions: Bachelor's or Masters degree in Computer Science, Electronics Engineering or equivalent practical experience 7/10+ years of hands-on experience in SystemVerilog/UVM methodology and/or C/C++ based verification 7/ 10+ years experience in IP/sub-system and/or SoC level verification based on SystemVerilog UVM/OVM...

We are seeking an experienced Verification Engineer or Senior Verification Engineer SOC. This position involves extensive hands-on experience with CPU verification using industry-standard functional verification methodologies, formal verification and constrained random generators, and reference model-based checkers. The candidate must be able to take...

We are seeking an experienced Verification Engineer or Senior Verification Engineer SOC. This position involves extensive hands-on experience with CPU verification using industry-standard functional verification methodologies, formal verification and constrained random generators, and reference model-based checkers. The candidate must be able to take...

We are seeking an experienced Verification Engineer or Senior Verification Engineer SOC. This position involves extensive hands-on experience with CPU verification using industry-standard functional verification methodologies, formal verification and constrained random generators, and reference model-based checkers. The candidate must be able to take...

Qualifications and Skills for DV Positions:Bachelor's or Masters degree in Computer Science, Electronics Engineering or equivalent practical experience7/10+ years of hands-on experience in SystemVerilog/UVM methodology and/or C/C++ based verification7/ 10+ years experience in IP/sub-system and/or SoC level verification based on SystemVerilog UVM/OVM based...

Qualifications and Skills for DV Positions: Bachelor's or Masters degree in Computer Science, Electronics Engineering or equivalent practical experience 7/10+ years of hands-on experience in System Verilog/UVM methodology and/or C/C++ based verification 7/ 10+ years experience in IP/sub-system and/or So C level verification based on System Verilog...

Design Verification Lead / Manager 8-15 years of experience in IP/Subsystem level Verification Good hands-on experience in verifying PCIe protocol (Gen4/Gen5/Gen6) Good knowledge on PCIe transaction layer, routing, reset flows etc Good experience with AXI protocol, NOC subsystem verification Good SV-UVM knowledge with hands-on experience in testbench...

Job Role : Senior ASIC Design Verification EngineerJob Summary :As a Senior ASIC Design Verification Engineer at Squareroot Consulting Pvt Ltd., you will be responsible for leading the design verification process of ASICs in datacenter applications such as Video, AI/ML and Networking Design. You will have hands-on experience in System Verilog/UVM methodology...

Qualifications and Skills for DV Positions: Bachelor's or Masters degree in Computer Science, Electronics Engineering or equivalent practical experience 7/10+ years of hands-on experience in SystemVerilog/UVM methodology and/or C/C++ based verification 7/ 10+ years experience in IP/sub-system and/or SoC level verification based on SystemVerilog UVM/OVM based...

Qualifications and Skills for DV Positions:Bachelor's or Masters degree in Computer Science, Electronics Engineering or equivalent practical experience7/10+ years of hands-on experience in SystemVerilog/UVM methodology and/or C/C++ based verification7/ 10+ years experience in IP/sub-system and/or SoC level verification based on SystemVerilog UVM/OVM based...