Verification Engineer or Senior Verification Engineer SOC
2 months ago
We are seeking an experienced Verification Engineer or Senior Verification Engineer SOC. This position involves extensive hands-on experience with CPU verification using industry-standard functional verification methodologies, formal verification and constrained random generators, and reference model-based checkers. The candidate must be able to take critical decisions and completely own verification closure for a block or feature. This position involves cross-functional interaction with CPU designers and architects and working across sites to ensure high-quality CPU designs for customers.
You will:
- Take full ownership and drive verification efforts to closure
- Work closely with designers and architects to understand specifications at unit/top level
- Understand use cases and develop functional test plans
- Develop directed tests written in C, Assembly, and SystemVerilog
- Develop random test generators to stress microarchitectural implementations
- Analyze coverage and fix holes in the test plan
- Enhance the verification environment and testbench using the latest methodologies, tools, and automation
- Support for prototyping in FPGA and/or Emulation
Ideally, you’ll have:
- Bachelor’s or Masters's degree preferred in Electronics/Electrical/Computer Engineering or equivalent field with 1+ years of industry experience with a focus on functional verification in SOC (System on Chip) verification.
- Familiarity with heterogenous multi-core, AMBA and high-speedIO architectures and industry-leading RISC or Arm processors
- Exposure to various EDA design verification tools with good digital design concepts
- Knowledge and experience with Interconnect protocols like AXI/ACE/OCP/CHI
- Scripting experience in Python/Perl/TCL/Shell
- Experience in creating functional test plans and implementing them as part of pre-silicon verification
- Strong knowledge of Verilog/SystemVerilog/C/C++/Assembly
- Strong analytical and problem-solving skills
- Are self-motivated with excellent communication and presentation skills, and the ability to collaborate well with local and global teams
A plus if you have:
- Experience with RISC-V, ARM, and/or MIPS CPU
- Experience with multi-core and coherency
- Familiarity with functional safety flows and requirements
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Bangalore, India MIPS Full timeWe are seeking an experienced Verification Engineer or Senior Verification Engineer SOC. This position involves extensive hands-on experience with CPU verification using industry-standard functional verification methodologies, formal verification and constrained random generators, and reference model-based checkers. The candidate must be able to take...
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bangalore, India MIPS Full timeWe are seeking an experienced Verification Engineer or Senior Verification Engineer SOC. This position involves extensive hands-on experience with CPU verification using industry-standard functional verification methodologies, formal verification and constrained random generators, and reference model-based checkers. The candidate must be able to take...
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bangalore, India MIPS Full timeWe are seeking an experienced Verification Engineer or Senior Verification Engineer SOC. This position involves extensive hands-on experience with CPU verification using industry-standard functional verification methodologies, formal verification and constrained random generators, and reference model-based checkers. The candidate must be able to take...
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bangalore, India MIPS Full timeWe are seeking an experienced Verification Engineer or Senior Verification Engineer SOC. This position involves extensive hands-on experience with CPU verification using industry-standard functional verification methodologies, formal verification and constrained random generators, and reference model-based checkers. The candidate must be able to take...
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bangalore, India MIPS Full timeWe are seeking an experienced Verification Engineer or Senior Verification Engineer SOC. This position involves extensive hands-on experience with CPU verification using industry-standard functional verification methodologies, formal verification and constrained random generators, and reference model-based checkers. The candidate must be able to take...
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