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About Omni Design Technologies
Omni Design Technologies is a leading provider of high-performance, ultra-low power IP cores, from 28nm down through advanced FinFET nodes, which enable differentiated system-on-chip (SoC), in applications ranging from 5G, wireline and optical communications, LiDAR, radar, automotive networking, AI, image sensors, and the internet-of-things (IoT).
Our data converter (ADC and DAC) IP cores range from 6-bit to 14-bit resolution and from a few MSPS to more than 100 GSPS sampling rates. Omni Design, founded in 2015 by semiconductor industry veterans, has an excellent track record of innovation and collaboration with customers to enable their success. The company is headquartered in Milpitas, California with additional design centers in Fort Collins-Colorado, Bangalore-India, Hyderabad-India, Dublin-Ireland, Boston-Massachusetts.
Principal SerDes Technology Expert
We are seeking a highly motivated and experienced Principal SerDes Technology Expert to lead the development of next-generation connectivity solutions. Your journey will begin by spearheading the design and optimization of high-performance Active Electrical Cables (AECs), enhancing electrical integrity and signal quality across demanding link budgets. Building on this foundation, you will architect and implement SerDes technology tailored for PCIe 7.Finally, your work will expand into integrating cutting-edge optical interconnects and optocouplers, driving innovations in retimer technologies and hybrid signaling frameworks.
This role directly impacts the performance and reliability of AI and cloud infrastructure—empowering massive data throughput, energy-efficient links, and scalable system architectures.
0, targeting data rates of 128 GT/s and beyond.
Spearhead the development and integration of advanced optical interconnects and retimer solutions within our Smart Cable Modules.
Define and specify the requirements for mixed-signal SerDes PHYs, including transmitter (TX), receiver (RX), and clock and data recovery (CDR) circuits.
Conduct in-depth analysis and simulation of high-speed channel performance, including signal integrity (SI) and power integrity (PI).
Stay at the forefront of industry standards and emerging technologies, particularly related to PCIe, CXL, and high-speed optical interconnects.
Bachelor's degree in Electrical Engineering, Computer Engineering, or a related field.
~15-25 years years of experience in high-speed SerDes design and development.
~ Proven expertise in PCIe protocols, with direct experience in PCIe 4.In-depth knowledge of mixed-signal design, including experience with PAM4 signaling, equalization techniques (e.g., Hands-on experience with high-speed test and measurement equipment (e.g., Strong understanding of signal integrity principles and experience with simulation tools (e.g., D. in a relevant technical field.
Experience with the design and integration of optical interconnects, silicon photonics, or high-speed optoelectronics.
Familiarity with the design of retimers and their application in Active Electrical Cables.
Experience with high-level modeling of SerDes links using tools like MATLAB or Python.
A track record of leading complex projects from concept to production.
We are seeking a highly skilled and experienced IP Design Engineer to join our team,
complex digital and mixed-signal design, with a particular emphasis on interfaces such
This role involves contributing to the full IP development lifecycle, from architectural
pass silicon success for critical products that enable next-generation data center
such as PCIe, Ethernet, and data center interconnects.
• This includes experience with
architectural definition, specification development, RTL coding, synthesis, static
timing analysis (STA), and collaborating on physical design activities (GDSII).
deep in-cable diagnostics (e.g., modes), fleet management, and security for robust interconnect solutions.
• and optimizing for performance, power, and area (PPA).
• JEDEC for DDR/LPDDR, QSFP-DD/OSFP mechanical and common management
Performance Optimization: Focus on achieving low-latency data paths (
Bachelor's or Master's degree in Electrical Engineering, Electronics Engineering,
or a related field.15-25 years of experience in digital, mixed-signal, or analog IP design within the
semiconductor industry. (Proven experience with high-speed interface designs such as UCIe, D2D, DDR
Demonstrated experience in the design and optimization of PLLs and/or DLLs,
cables.
• Proficiency with industry-standard EDA tools for design, simulation, and analysis.
• Experience with deep diagnostic features, security implementations (firmware
Mining The Knowledge Community"
