High-Speed Interface Test Engineer

2 days ago

Bengaluru, Karnataka, India beBeeDft Full time ₹ 18,00,000 - ₹ 20,00,000

Job Title :

About the Position :

We are seeking a skilled DFT Verification Engineer with expertise in DDR IP or Subsystem-level verification.

You will design silicon test patterns, validate them through simulations, and ensure robust testability for high-speed DDR interfaces.

This is a crucial engineering role for someone passionate about silicon test strategy, DDR technologies, and pre-silicon verification in advanced SoC designs.

Main Responsibilities :

  • Verify DDR IP/subsystems using pattern-based testing methodologies.
  • Generate and validate JTAG-based test patterns specifically for DDR interfaces.
  • Perform Gate-Level Simulations (GLS) to validate generated test patterns.
  • Develop verification plans, write testbenches, and debug test pattern failures.
  • Collaborate with RTL, validation, and test teams to ensure seamless test integration.
  • Contribute to ATPG/MBIST pattern integration and test coverage improvements.
  • Ensure patterns meet structural and functional test goals without impacting design performance.

Necessary Skills and Qualifications :

  • Bachelor's or Master's degree in Electronics, Electrical, or VLSI Design.
  • 4 to 9 years of industry experience in DFT Verification, with specific focus on DDR IP or DDR subsystem-level testing.
  • Strong knowledge of DFT concepts including JTAG, boundary scan, scan insertion, ATPG, and MBIST.
  • Proven experience in pattern generation and gate-level simulation for high-speed interfaces.

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