Timing Engineer

1 month ago


Bengaluru, Karnataka, India Qualcomm Full time

Job Title: STA Timing Engineer

Job Summary:

We are seeking a highly skilled STA Timing Engineer to join our team at Qualcomm. As a STA Timing Engineer, you will be responsible for setting up, converging, and reviewing STA flows for multi-mode, multi-voltage domain designs. You will also be responsible for timing analysis, validation, and debug across multiple PVT conditions using PT/Tempus.

Responsibilities:

  • Setup and optimize STA flows for multi-mode, multi-voltage domain designs
  • Perform timing analysis, validation, and debug across multiple PVT conditions using PT/Tempus
  • Run Primetime and/or Tempus for STA flow optimization and Spice to STA correlation
  • Evaluate multiple timing methodologies/tools on different designs and technology nodes
  • Work on automation scripts within STA/PD tools for methodology development
  • Collaborate with cross-functional teams to ensure timely and accurate delivery of STA flows

Requirements:

  • Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience
  • Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience
  • PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience

Preferred Qualifications:

  • Strong expertise in STA timing analysis basics, AOCV/POCV concepts, CTS, defining and managing timing constraints, Latch transparency handling, 0-cycle, multi-cycle path handling
  • Hands-on experience with STA tools - Prime-time, Tempus
  • Experience in driving timing convergence at Chip-level and Hard-Macro level
  • In-depth knowledge cross-talk noise, Signal Integrity, Layout Parasitic Extraction, feed through handling
  • Knowledge of ASIC back-end design flows and methods and tools (ICC2, Innovus)
  • Knowledge of Spice simulation Hspice/FineSim, Monte Carlo. Silicon to spice model correlation
  • Proficient in scripting languages – TCL, Perl, Awk
  • Basic knowledge of device physics

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