Senior Timing Analysis Engineer

1 month ago


Bengaluru, Karnataka, India BITSILICA Full time
Job Title: STA Engineer

Bitsilica is seeking a highly skilled STA Engineer to join our team.

Job Description:

We are looking for a talented individual with expertise in STA tool PrimeTime /Tweaker/ DMSA(PTECO) to work on timing closure of high frequency blocks & subsystems (Ghz range ).

The ideal candidate will have a deep understanding of timing corners/modes, process variations and signal integrity related issues, as well as experience in working full-chip STA closure, defining mode requirements and corners for timing closure.

The successful candidate will also have a strong understanding of DFT modes requirements for timing signoff, good understanding of physical design flow and ECO implementation, and strong TCL/scripting knowledge.

Responsibilities will include:

  • Developing synthesis constraints for high frequency blocks & subsystems
  • Performing timing closure of full-chip STA
  • Defining mode requirements and corners for timing closure
  • Implementing ECO cycles for timing signoff
  • Developing and maintaining TCL scripts for STA tool automation

Preferred qualifications include experience in Formal Verification with Synopsys Formality and / or Cadence Conformal LEC, and strong understanding of timing constraints & physical design flow.

Apply now by sending your resume to suman.ragothama@bitsilica.com.



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