Digital Systems Verification Expert

4 days ago


Gulbarga, Karnataka, India beBeeSeniorDesignVerificationEngineer Full time ₹ 1,50,00,000 - ₹ 2,00,00,000

Job Opportunity:

    We are seeking an experienced Senior Design Verification Engineer to join our team. As a key member of our design verification group, you will be responsible for developing and verifying digital systems using System Verilog, UVM, and C programming languages.

    Your primary focus will be on creating verification environment architecture documents, reviewing and revising designs to meet agreed-upon acceptance criteria, and developing transactors, monitors, and models for performance verification.

    Additionally, you will implement performance verification flow, including monitoring, synchronization, reporting, and self-checking mechanisms. You will also provide full reports of performance metrics and bottlenecks, track tickets and code releases using Bug Tracking tool and GIT.

    The ideal candidate should have 7+ years of experience in design verification and a strong understanding of digital system design principles. They should be proficient in System Verilog, UVM, and C programming languages, as well as have experience with simulation tools like Synopsys and Cadence.



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