
Senior ASIC/Digital Fault Testing Specialist
6 days ago
Job Title: Digital Fault Testing Engineer
Overview:
As a seasoned ASIC/DFT engineer, you will be responsible for developing and implementing digital fault testing solutions to ensure the reliability and integrity of complex electronic systems. The ideal candidate will have a strong background in digital circuit design, simulation, and validation.
Key Responsibilities:
- Develop and implement ATPG test patterns for stuck-at (SAF) and transition fault (TDF) models through the use of on-chip test compression techniques.
- Collaborate with cross-functional teams to ensure DFT design rules and coverages are met.
- Generate high-quality manufacturing test patterns using Mentor tools.
- ATPG (SAF, TDF) and MBIST verification using unit delay and min/max timing corner simulations.
- Support post-silicon debug efforts and issue resolution.
- Develop Diagnostic Tools for ATPG, MBIST, and bring-up on ATE.
Required Skills and Qualifications:
- Bachelor's degree in Computer Science, Electrical/Electronics Engineering.
- Minimum of 4 to 12 years of experience in ASIC/DFT - simulation and silicon validation.
- Hands-on experience in at least one Full Chip DFT.
- Detailed knowledge of DFT concepts, pattern simulation, silicon debug, and yield enhancement.
- Expertise in ATPG - coverage analysis.
- Experience with Memory verification, repair, and failure root-cause analysis.
- Proficiency in scripting languages such as Perl, shell, etc., is an added advantage.
Preferred Qualifications:
- Ability to work in a dynamic environment with good communication skills.
- Ability to learn and adapt to new tools and methodologies.
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