Principal Verification Engineer

22 hours ago


Kollam, Kerala, India beBeeVerification Full time ₹ 20,00,000 - ₹ 25,00,000

Job Overview:

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This position is responsible for leading the strategic development and execution of analog/mixed-signal verification plans for IPs and SoCs. The successful candidate will have a strong background in mixed-signal simulation, behavioral modeling, and collaboration with cross-functional teams.

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Key Responsibilities:

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  • Develop comprehensive verification strategies, including testbench design, stimulus generation, and checking methodologies.">
  • Collaborate with analog designers to create AMS behavioral models (e.g., Verilog-A/AMS) for early integration and verification.">
  • Debug complex AMS simulation issues across multiple abstraction levels.">
  • Drive coverage analysis and sign-off using functional, formal, and assertion-based methods.">
  • Mentor junior engineers in best practices, methodologies, and tool usage.">
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Requirements:

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  • Minimum 8+ years of hands-on AMS verification experience in IP/SoC projects.">
  • Proven track record in building verification environments using SystemVerilog, Verilog-AMS, or UVM.">
  • Strong background in mixed-signal simulation, behavioral modeling, and teamwork.">
  • Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related field.">


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