
Senior Verification Engineer
2 days ago
A seasoned verification professional with 8+ years of experience is required to lead our team. The successful candidate will have a strong background in electrical engineering and excellent knowledge of computer architecture and design verification fundamentals.
Key Responsibilities
- Implement simulation testbenches, low power simulation setup, assembly/C language diagnostics, assertion checkers or coverage monitors to meet target verification goals.
- Assist with developing test-plans, debugging failures and analyzing coverage information.
- Develop complex test benches in System Verilog using OVM/UVM methodology.
- Work on Low Power Simulation/UPF setup, debug low power simulation failures.
- Use scripting languages like Perl, Unix shell or similar languages.
- Have hands-on experience in PCIe MAC, USB MAC, Bluetooth MAC or Wifi 802.11 MAC layer protocol.
Requirements
- Bachelor's (or higher) degree in EE/ECE Engineering.
- 8+ years of design verification experience.
- Excellent written and oral communication skills necessary.
Desirable Skills
- Hands-on experience in AMBA protocol.
- Experience in developing assembly language programs.
About Our Team
We are a leading provider of innovative solutions across industries and global markets.
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