
High-Speed Digital Design Expert
1 day ago
Job Description:
Unlock Your Potential in High-Speed Digital DesignAs a senior RTL design engineer, you will be part of our Computing and Graphics group. You will work closely with architecture, IP design, physical design teams, and product engineers to achieve first-pass silicon success.
Key Responsibilities:
- Design and integrate IPs and subsystems with 3rd-party components.
- Perform quality checks (lint, CDC, and power rule checks) on power-gated digital designs.
- Collaborate with the IP team to support design verification, implementation (synthesis, constraints, static timing analysis), and delivery to SOC.
- Work in partnership with SOC teams to support the IP at SOC level, including connectivity, DFT, verification, physical design, firmware, and post-silicon bring-up.
- Proficiency in verilog/system verilog RTL logic design of high-speed, multi-clock digital designs.
- Verilog lint tools (Spyglass) and verilog simulation tools (VCS).
- Clock domain crossing (CDC) tools.
- Detailed understanding of SoC design flows.
- Understanding of IP/SS/SoC Power Management techniques – Power Gating, Clock Gating.
- Experience with embedded processors and data fabric architectures (NoC).
Requirements:
- Bachelor's or Master's degree in Computer Engineering/Electrical Engineering.
- 5 years of experience developing RTL for IP or subsystems.
- Strong understanding of architectural specifications.
- Excellent interaction skills while communicating both written and verbally.
- Ability to work with multi-level functional teams across various geographies.
- Outstanding problem-solving and analytical skills.
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