High Speed Analog Design Engineer Opportunity in Bangalore
2 weeks ago
About the Role
Mulya Technologies, a top semiconductor organization, is seeking an experienced Senior Analog Design Engineer to join its high-speed PHY design team.
We are a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence. Our vision is to transform how the world uses information to enrich life.
This challenging role involves taking ownership of analog sub-blocks inside the PHY and driving specification and implementation, including transistor and block level design, simulation, reliability, and mixed mode simulations. The ideal candidate will work closely with cross-functional teams to drive layout of complex blocks through mask designers and conform to complex process rules as well as DFM.
Responsibilities
- Take ownership of analog sub-blocks inside the PHY and drive specification and implementation
- Drive layout of complex blocks through mask designers
- Participate in design reviews both internally and potentially with customers to explain design choices and robustness
- Work with people across multiple sites, including overseas
- Help create IP EDA views: Behavioral/Verilog-A, timing views, abstract, etc.
Requirements
The successful candidate should have deep understanding of analog and mixed-signal circuit experience in high-speed link designs. Prior experience in taking full ownership of at least one sub-block like PLL, DLL, CDR, high-speed receiver with equalization, transmitter front end, and high-speed data path is required. Experience with TX RX Equalization (FFE/CTLE/DFE) and various CDR and Clocking architecture is a must. Candidate should have experience in FinFET 10nm and below.
We offer a competitive salary of Rs 40 Lakhs per annum and excellent benefits package, including opportunities for career growth and professional development. If you are passionate about innovation and technology, we encourage you to apply for this exciting opportunity.
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