Lead Analog Design Engineer

3 days ago


Bengaluru, Karnataka, India Mulya Technologies Full time
Job Overview

We are seeking a highly skilled Lead Analog Design Engineer to join our team at Mulya Technologies. The successful candidate will be responsible for designing and implementing high-speed analog circuits for our cutting-edge memory and storage solutions.

About Us

Mulya Technologies is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence. Our vision is to transform how the world uses information to enrich life.

Job Description
  • Take ownership of analog sub-blocks inside the PHY and drive the specification and implementation, including transistor and block level design, simulation, reliability, and mixed-mode simulations.
  • Drive layout of complex blocks through mask designers and conform to complex process rules as well as DFM.
  • Participate in design reviews both internally and potentially with customers to explain design choices and robustness.
  • Work with people across multiple sites, including overseas.
  • Help with creating IP EDA views: Behavioral/Verilog-A, timing views, abstract etc.
  • Participate in silicon bring-up, characterization, and perform correlations against models and simulations.
  • Mentor and supervise junior engineers.
Requirements
  • Circuit design experience in analog/mixed-signal CMOS circuits in deep sub-micron technologies (5 – 40 nm) in High speed Memory interfaces (DDR3/4/5, LPDDR3/4x/5, GDDR5/6) or SerDes Interfaces (PCIe, MIPI, HDMI, USB, SATA etc).
  • Prior experience in taking full ownership of at least one of the sub-blocks like PLL, DLL, CDR, high-speed receiver with equalization, transmitter front-end, and high-speed data path.
  • Deep understanding of analog and mixed-signal circuit with experience in high-speed links.
  • Experience with TX RX Equalization (FFE/CTLE/DFE) is a must.
  • Experience with various CDR and Clocking architecture.
  • Candidate should have experience in finFET 10nm and below.
  • Able to create block-level specification based on link budget.
  • Able to create system-level modeling using VerilogA/Python.
  • Should be able to work with Packaging/Board team.
  • Should have knowledge of ESD.
  • Experience in lab testing and working with validation team to analyze data.
  • High-speed I/O cell designs such as DDR, LVDS, HSTL, CML.
  • Power Delivery circuits such as Bandgap, LDO, Bias circuits.
  • Strong fundamental knowledge for AMS design, Advanced CMOS, and FinFET technologies.
  • Understanding of Mismatch analysis & Monte-Carlo methodology/sims, transistor-level Circuit-level noise analysis. Understanding of device physics & deep-sub-micron issues.
  • Supervision of complex and/or sensitive analog layout and defining IP floorplan.
  • Experience with industry-standard tools such as Cadence ADE, Spectre, AMS verification, EM/IR flows, MATLAB, Calibre etc.
  • Working knowledge of Mixed mode simulation, Signal Integrity, and ESD desired.
  • M.S./M.Tech, BS/BE (Electronics)
  • Experience Required: 10+ Years
Salary Range

The estimated salary range for this position is between $120,000 and $180,000 per year, depending on experience and qualifications.

Benefits

Mulya Technologies offers an excellent pay package, including benefits and opportunities for career growth and development.



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