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Senior Analog Design Verification Engineer Lead
1 month ago
We are seeking an experienced Senior Analog Design Verification Engineer Lead to join our team at Analog Devices. This role is perfect for a highly motivated and skilled engineer who can lead complex analog design verification projects from concept to delivery.
The successful candidate will have a strong background in analog/mixed signal behavioral modeling, full chip verification, and mixed signal design architectures. They will be responsible for developing verification plans, building verification environments, and creating self-checking testcases. The ideal candidate will also have experience with industry-standard SV/UVM based metric driven verification approaches.
This role offers a unique opportunity to work on cutting-edge analog products and collaborate with a talented team of engineers from various disciplines. As a Senior Analog Design Verification Engineer Lead, you will be expected to mentor junior engineers and contribute to the development of innovative design verification methodologies.
Key Responsibilities- Lead complex analog design verification projects from concept to delivery
- Develop verification plans, build verification environments, and create self-checking testcases
- Collaborate with team members from various disciplines to achieve first-pass silicon
- Mentor junior engineers and contribute to the development of innovative design verification methodologies
To succeed in this role, you should have:
- A B.Tech/M.Tech degree in Electrical Engineering or related field
- 8+ years of experience in analog/mixed signal behavioral modeling, full chip verification, and mixed signal design architectures
- Strong knowledge of analog design concepts, mixed signal design architectures, and digital control and signal processing
- Experience with industry-standard SV/UVM based metric driven verification approaches
- Excellent communication and interpersonal skills, with ability to influence innovative design development/verification methodologies
Candidates with experience in the following areas will be preferred:
- Modeling of analog blocks using Verilog-AMS, Schematic based structural models (macro models), and familiarities with Analog/Mixed-Signal/RF design architectures
- Co-simulations with tools such as Cadence ADE/Cadence AMSD with Spectre as the analog solver and Xcelium as the digital solver
- Debug experience with schematic capture tools such as Cadence Virtuoso and waveform viewers such as Cadence Simvision
- Experience with automation scripting languages: Python/Perl/Shell etc., Embedded programming for on-chip micros or separate MCU's, and Matlab/Simulink for system level simulations and modeling
The estimated annual salary range for this position is $120,000-$160,000, depending on experience and qualifications.
