Senior DFT Architect

1 day ago

Nashik, Maharashtra, India beBeeEngineering Full time ₹ 1,50,00,000 - ₹ 2,50,00,000

Job Title: Lead DFT Engineer

We are seeking a skilled professional to drive digital full test (DFT) architecture, planning, and implementation across complex system-on-chip (SoC)/application-specific integrated circuit (ASIC) designs.

The ideal candidate will mentor junior engineers, collaborate with cross-functional teams, and ensure world-class testability and manufacturability of silicon products.

Key Responsibilities:
  • Define and drive DFT strategy and architecture for multiple ASIC/SoC projects.
  • Implement and verify DFT features such as scan insertion and compression, automatic test pattern generation, and fault grading.
  • Collaborate with register transfer level (RTL), static timing analysis (STA), physical design (PD), and test engineering teams for seamless integration.
Required Skills and Qualifications:
  • Bachelor's or Master's degree in Electronics, Electrical, or VLSI Design.
  • 7+ years of experience in DFT for complex ASIC or SoC designs.
  • Expertise in scan insertion, compression, ATPG, MBIST, and boundary scan.
  • Hands-on experience with DFT tools such as Synopsys: DFT Compiler, TetraMAX, TestMAX Siemens EDA: Tessent ScanPro, MBIST, IJTAG Cadence/others: Modus, Encounter Test.
Benefits:
  • Drive high-performance, next-gen SoCs and ASICs.
  • Collaborate with top-tier engineers and global semiconductor leaders.

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