Talented Designer Wanted for Advanced ASIC Projects

1 day ago


Vizag, Andhra Pradesh, India beBeeDesigner Full time ₹ 25,00,000 - ₹ 35,00,000

Effective Physical Design Expert Required

Key Responsibilities:
  • Provide technical leadership and mentorship to physical design engineers.
  • Interface with front-end ASIC teams to resolve complex issues.
  • Develop low power design solutions using voltage islands, power gating, and substrate-bias techniques.
  • Achieve timing closure on DDR2/DDR3/PCIE interfaces.

The ideal candidate will possess

  • Experience in top-level floor planning, power grid planning, partitioning, placement, scan-chain reordering, clock tree synthesis, timing optimization, SI-aware routing, timing analysis/closure, and ECO tasks (timing and functional ECOs), SI closure, design rule checks (DRC), and logical vs. schematic (LVS) checks, antenna checks.
  • Worked on 65nm or lower node designs with advanced low power techniques such as voltage islands, power gating, and substrate-bias.
  • Strong background in ASIC physical design: floor planning, P&R, extraction, IR drop analysis, timing, and signal integrity closure.
  • Extensive experience and detailed knowledge in Cadence or Synopsys or Magma physical design tools.
  • Expertise in scripting languages such as PERL, TCL.
  • Strong physical verification skill set.
  • Static timing analysis in Primetime or Primetime-SI.

Additional requirements include

  • Excellent communication skills.
  • Ability to clearly document plans.
  • Ability to interface with different teams and prioritize work based on project needs.


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