Senior Digital Fault Tolerance Engineer

2 days ago


Bengaluru, Karnataka, India beBeeFault Full time ₹ 20,00,000 - ₹ 25,00,000
Job Overview

We are seeking a seasoned digital fault tolerance engineer to lead the development and implementation of advanced techniques.

The ideal candidate will have a strong background in scan design, clock architecture, ATPG methodology, and industry-standard tools. Experience with test compression and decompression, as well as stuck-at and at-speed fault coverage analysis, is highly desirable.

  • Develop and implement boundary scan test plans with JTAG compliance.
  • Design and integrate MBIST concepts into SoC designs.
  • Collaborate with cross-functional teams to ensure seamless integration of DFT techniques.

This role requires a self-driven individual with excellent communication skills, who can work effectively in a team environment and drive results-oriented solutions.



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