
Distinguished Physical Designer
1 day ago
We are seeking a highly skilled Physical Design Engineer to join our team. As a key member of our design team, you will be responsible for all aspects of physical design for full-chip and block-level designs.
The ideal candidate will have strong knowledge of EDA tools, such as DC, ICC2, Cadence Innovus, STAR-RC, PT-SI, Verplex, Quartz, Calibre, and internal tools and flow. Experience with Synopsys/Cadence/Mentor place and route tools is also essential.
You will work closely with the methodology team to solve implementation challenges and provide inputs to improve the physical design flow. Strong communication and presentation skills are required, as well as good interpersonal skills and problem-solving ability.
Key Responsibilities:
- Design automation
- Timing constraints, SI prevention, power reduction
- Implementation of low-power solutions
- ECO tasks (timing and functional)
- EM/IR, DRC, LVS, ERC analysis and fixes
- 4+ years experience in ASIC physical design
- Experience with block implementation, extraction, timing, and/or full-chip designs
- Strong communication skills
- Strong hands-on TCL/Perl development skills
Preferred Qualifications:
- Experience as a full-chip floorplanning, routing, or timing lead for a large silicon project
- Track record of taping out complex chips on advanced process nodes
What We Offer:
Opportunity to work with a talented team of engineers on cutting-edge projects
Professional growth and development opportunities
Collaborative and dynamic work environment
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