
Senior RTL Architect and Designer
5 days ago
RTL Design Engineer
At Tessolve Semiconductor in Bangalore, we are currently seeking experienced RTL Design Engineers and Verification Engineers to contribute to our cutting-edge projects.
The ideal candidate for this position will have 5+ years of experience in RTL ASIC design with expertise in Logic design, IP integration, and Synthesis. Proficiency in tools like Lint and CDC is a must, while knowledge of AMBA protocols and SoC clocking/reset architecture is highly desirable.
Design Verification Engineers should have 5-20 years of experience in SV/UVM, SOC verification using C/SV, Third Party VIP Integration, and Interconnect Protocols. Familiarity with High Speed Serial Interfaces, Memory Interfaces, Coverage Closure, and Technical Documentation is also essential.
As an RTL Design Engineer at our company, you will have the opportunity to leverage your skills to deliver innovative solutions in a collaborative environment. If you are passionate about making a meaningful contribution, we encourage you to apply now
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