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6 days ago
We are seeking an experienced and skilled Senior Microchip Architect to lead the development of high-performance microchips. This is a critical role that requires strong technical expertise, excellent leadership skills, and the ability to work collaboratively with cross-functional teams.
The successful candidate will be responsible for owning the overall microchip architecture and design execution, including multi-block design integration, handoff and sign-off of key stages, and driving IP integration and clocking strategy. They will also engage with external IP vendors and EDA tool providers to ensure seamless collaboration.
Required Skills and Qualifications- Strong background in digital IC design (RTL to GDSII) and system-level architecture and IP integration.
- Expertise in timing closure (STA) and power-performance-area (PPA) optimization.
- Familiarity with design for manufacturability, test (DFT), and silicon debug.
Prior experience in managing complex projects and leading cross-functional teams is essential. A bachelor's degree in electrical engineering, electronics, or computer engineering is required, with a master's or PhD in VLSI design, microelectronics, or computer architecture being preferred.
Key Responsibilities- Lead multi-block design integration.
- Manage handoff and sign-off of key stages: RTL freeze, synthesis, place & route, static timing analysis, and DFT.
- Drive IP integration, clocking strategy, and power domain definition.
- Cross-Functional Collaboration.
- Identify and mitigate design and schedule risks.
- Engage with external IP vendors and EDA tool providers.
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