Senior Verification Engineer

DFT Verification Expert WantedWe are seeking a highly skilled Senior Verification Engineer with expertise in Design for Test (DFT) to join our team. The ideal candidate will have a strong background in verification methodologies, including Verilog, System Verilog, SVA, and UVM. Experience with EDA simulation tools like Synopsys VCS, Cadence NCSIM, and Verdi...

Job DescriptionWe are seeking a highly skilled Senior Design Verification Engineer to join our team. As a senior member of our verification group, you will be responsible for leading the design and implementation of complex digital IP verification flows.

We are seeking an experienced pre-silicon verification engineer to join our team and help us enhance our configurable testbench.The RoleThis position is focused on verifying new features for client, server, graphics, and semi-custom interconnects using System Verilog / UVM-based testbenches.Key ResponsibilitiesDevelop and enhance testbenches to verify new...

Job Title: Senior Verification ExpertThis is a lead role for experienced engineers to excel in design verification.Main Responsibilities:Develop and implement comprehensive verification environments using UVM methodology.Create and execute verification infrastructure, covering full design cycles.Verify CPU subsystems or SoCs using StemVerilog/UVM and/or...

Job Title: Senior SOC Verification EngineerAbout the RoleWe are seeking a highly skilled and experienced Senior SOC Verification Engineer to join our team. As a key member of our verification team, you will be responsible for verifying and integrating complex System-on-Chip (SOC) designs.Key ResponsibilitiesDesign and implement test plans, test cases, and...

Tips: UVM, Design Verification.ResponsibilitiesSenior DV engineer to develop UVM/SV-based testbenchGood knowledge of SV/UVM is a must.Should have developed UVM/SV components like driver/monitor/scoreboard,Individual contributor roleExposure to protocols like AMBA, Serial protocols, PCIe, EthernetQualifications6 to 8 years of DV experience minimum.Mtech/Btech...

Senior Design Verification EngineerJob Overview:We are seeking a highly skilled Senior Design Verification Engineer to develop UVM/SV-based testbenches.The ideal candidate will have excellent knowledge of SV/UVM and experience working with protocols like AMBA, Serial protocols, PCIe, and Ethernet.Key Responsibilities:Develop advanced UVM/SV components...

Key Responsibilities:Verification of integrated circuits and subsystems for advanced technologiesCreate test plans, develop testbenches, write constrained random test cases, perform code coverage analysis, create coverpoints and analyze functional coverage.Work collaboratively with other members of the engineering team to support design implementation for...

Senior Design Verification EngineerWe are seeking an experienced Senior Design Verification Engineer to join our SoC/ASIC verification team. The ideal candidate will have a deep understanding of the verification lifecycle and be able to independently drive complex verification tasks for IP, subsystem, or full-chip level designs.About This RoleDevelop and...

Senior Verification Engineer (DFT)We are seeking a seasoned Digital Functional Test (DFT) engineer to join our team. This role will be responsible for designing and implementing DFT features, as well as verifying their functionality.The ideal candidate will have a strong background in Verilog, SystemVerilog, SVA, UVM verification methodologies, and C++...