Expert Digital Fault Tolerant Architect

5 days ago

Tiruchi, Tamil Nadu, India beBeeDigitalFaultTolerance Full time ₹ 18,00,000 - ₹ 20,10,000
Senior DFT Engineer Role

As a Senior Digital Fault Tolerant (DFT) Engineer, you will be responsible for designing and implementing robust test architectures for complex ASIC/SoC designs.

Key responsibilities include:

  • Designing and verifying scan chains, boundary scan (JTAG), MBIST, LBIST, and other test structures to ensure reliable testing
  • Collaborating with design teams to seamlessly integrate DFT features into the design
  • Generating and validating test patterns using ATPG tools for stuck-at, transition, and path delay faults to optimize test quality
  • Performing fault simulation and coverage analysis to identify areas for improvement
  • Supporting silicon bring-up and debug of test-related issues to ensure timely product release
  • Working closely with production teams to develop test programs and support production testing

Minimum 3 years of experience in DFT engineering is required, with a strong background in digital logic design and a solid understanding of CAD tools.

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