Senior Silicon Design Engineer
5 days ago
As a Senior Engineer, you will play a pivotal part in shaping the future of Silicon Design. You will lead the development of world-class DFT architecture for EPYC Server products.
Responsibilities
- Collaborate closely with SoC Architects and Micro Architects to define the DFT architecture.
- Drive the implementation of DFT RTL, functional, and scan capture timing closure.
- Develop and implement Scan ATPG to meet product coverage goals.
Requirements
- A minimum of 15 years' experience in DFT, with a strong track record of driving multiple Tapeouts and silicon bring-ups across various process nodes.
- Proven understanding of SoC design and architecture, verif, and timing concepts.
- Experience with JTAG, SCAN, MBIST, BScan, and other DFT concepts is essential.
Benefits
Our organization offers a comprehensive package of benefits, including opportunities for growth and development.
What We Look For
We are looking for individuals who possess strong technical expertise, leadership qualities, and excellent communication skills. If you have a passion for innovation and are driven to succeed, we encourage you to apply.
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