Chief Digital Forensics Architect

1 day ago

Delhi, Delhi, India beBeeDesigner Full time ₹ 20,00,000 - ₹ 26,00,000
Job Opportunity:

We are seeking a senior DFT expert to lead the development and implementation of advanced digital forensic techniques for complex SoC/ASIC designs.

  • Develop and drive comprehensive DFT strategies, focusing on pattern generation, fault simulation, and debug test coverage.
  • Manage the end-to-end DFT flow from RTL to gate-level netlist and silicon bring-up, ensuring seamless integration with cross-functional teams.
  • Collaborate with engineers to implement and verify DFT features like scan insertion and compression, ATPG pattern generation and fault grading, MBIST and Logic BIST insertion and validation.
Key Responsibilities:
  • Drive DFT signoff, timing closure (DFT-related paths), and ATE pattern delivery.
  • Mentor junior DFT engineers, conduct design reviews, and provide training sessions.
  • Develop and maintain DFT automation scripts and infrastructure, ensuring efficiency and scalability.
Requirements:
  • Master's degree in Electronics, Electrical, or VLSI Design.
  • 7+ years of experience in DFT for complex ASIC or SoC designs.
  • Expertise in scan insertion, compression, ATPG, MBIST, and boundary scan technologies.
  • Familiarity with scripting languages (Python, Perl, Tcl) for flow automation.

This role offers competitive compensation, opportunities for professional growth, and collaboration with top-tier engineers on high-performance projects.

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