Senior Digital Fault Tolerance Specialist

3 days ago

Kurnool, Andhra Pradesh, India beBeeDigitalFaultTolerance Full time ₹ 20,00,000 - ₹ 25,00,000

Job Description:

Our organization seeks an accomplished professional to spearhead the development and implementation of Digital Fault Tolerance (DFT) techniques in electronic design automation (EDA) tools. This entails collaborating with multifaceted teams to create, test, and deliver high-quality DFT solutions.

Key Responsibilities:

  • Develop and maintain in-depth knowledge of DFT concepts, including scan insertion, ATPG, coverage analysis, transition delay test coverage analysis, MBIST insertion, and memory test validation.
  • Collaborate with engineers to provide expert-level technical support on DFT-related issues, including test mode timing constraints definition and corrective actions for timing violations.
  • Utilize scripting languages such as Perl and shell to automate tasks and improve efficiency.
  • Work with RTL and Gate level simulations to develop and validate scan and MBIST test vectors.
  • Perform equivalence checks and DFT DRC rules using RTL lint tools and ATPG tools.
  • Stay up-to-date with new tools and methodologies, and adapt to changing project requirements.
  • Effectively communicate complex technical information to both technical and non-technical stakeholders.
  • Lead cross-functional teams to achieve project goals and deliver high-quality results.

Requirements:

  • 7+ years of experience in DFT or related field.
  • Expert-level knowledge of DFT concepts, including scan insertion, ATPG, and coverage analysis.
  • Hands-on experience with EDA tools, including Synopsis TetraMax/DFTMax and Cadence Encounter Test.
  • Strong understanding of RTL and Gate level simulations.
  • Excellent problem-solving and communication skills.
  • Ability to work in a dynamic environment and adapt to changing priorities.

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