Principal Interconnect Fabric Design Engineer

3 weeks ago


Hyderabad, Telangana, India Mulya Technologies Full time

We are seeking a highly skilled Principal Interconnect Fabric Microarchitecture & IP Logic Design Engineer to join our team at Mulya Technologies.

As a key member of our engineering team, you will be responsible for designing high-performance interconnects, fabrics, and NoCs.

Key Responsibilities:

  • Design high-performance interconnects, fabrics, and NoCs
  • Architectural exploration for power, performance, and area-efficient interconnect systems
  • Develop microarchitecture for PPA efficiency and create microarchitecture specification documents
  • Perform efficient RTL coding in Verilog or System Verilog for IP development
  • Collaborate with performance analysis team to design, correlate, and enhance performance metrics
  • Collaborate with pre-silicon verification, emulation, and post-silicon validation teams to develop validation infrastructure and ensure design functionality
  • Collaborate with physical design team in synthesis, place, and route planning to ensure design meets area and frequency requirements
  • Work with cross-functional engineering teams to ensure high-quality design

Requirements:

  • Master's, PhD, or bachelor's degree in a relevant subject area
  • Thorough knowledge of high-performance coherent and non-coherent interconnects
  • Prior experience with on-chip interconnect protocols like CHI, ACE, AXI, TileLink, or their equivalent X86 protocols
  • Knowledge of on-chip network topologies like Mesh, Crossbar, Ring, etc.
  • Prior experience with CPU, GPU, or system caches and coherency protocols
  • Understanding of high-performance and low-power microarchitecture techniques and logic design principles
  • Proficiency in Verilog or System Verilog coding and ability to identify PPA efficiency enhancements in RTL
  • Experience with front-end ASIC design EDA tools like simulators, waveform debuggers, IDEs, etc.


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