Senior DFT Verification Engineer
4 weeks ago
- NVIDIA is a pioneer in the field of computer graphics, parallel computing, and artificial intelligence. As a DFT Verification Engineer, you will be part of a team that works on groundbreaking innovations in Design-for-Test (DFT) architecture, implementation, verification, and post-silicon validation.
- You will implement verification methodologies for DFT IP at unit and system levels, using SystemVerilog, UVM, FPGA, and Emulation applications in the DFT domain.
- The ideal candidate will have a strong background in DFT verification, with expertise in 1149.X or 1500, DFT scan architecture, DFT clocking, and Design for debug.
- Additionally, you will have experience with prototyping, verification, and debug tools, such as Emulation, FPGA, VCS, Debussy, Formality, and PrimeTime.
- You will also collaborate closely with multi-functional teams, including chip architecture, ASIC design, functional verification, and post-silicon teams.
- The selected candidate will be part of an innovation-driven team, striving to improve the quality of DFT methods.
- Requirements:
- BSEE with 3+ or MSEE with 2+ years of experience in DFT verification or related domains.
- Strong expertise in System Verilog and verification methodologies like UVM/VMM.
- Excellent written and oral communication skills.
- Excitement to work on rare challenges.
- Strong analytical and problem-solving skills.
- Preferred skills:
- Strong experience or interest in both DFT and RTL Verification domains.
- Knowledge in Formal verification methodologies and tools for IP and SoC level verification.
- Hands-on experience in post-silicon debug on ATE and/or system labs.
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