Senior Digital Block Engineer

2 weeks ago


Hyderabad, Telangana, India beBeeVerification Full time US$ 5,50,000 - US$ 6,50,000

Job Title: Verification Engineering Lead

About the Role:

  • Drive verification processes for complex digital blocks or system-on-chip (SoC) subsystems.
  • Develop comprehensive test plans, strategies, and coverage metrics aligned with design specifications.
  • Create and maintain constrained-random and directed testbenches using SystemVerilog/UVM.
  • Collaborate with architects, designers, and other verification engineers to identify and resolve design issues.
  • Establish and maintain verification infrastructure, scripts, and regression systems.
  • Analyze functional and code coverage, driving closure towards high-quality designs.
  • Provide technical guidance and mentorship to junior team members.
  • Participate in silicon bring-up and post-silicon validation as needed.

Required Skills and Qualifications:

  • Bachelor's/Master's degree in Electronics, Electrical, or Computer Engineering.
  • 8–14 years of hands-on experience in ASIC/SoC verification.
  • Strong expertise in SystemVerilog, UVM, and RTL simulation tools (e.g., VCS, Questa).
  • In-depth understanding of verification methodologies, functional coverage, and assertion-based verification.
  • Experience in developing and maintaining testbenches from scratch.
  • Strong debugging skills and familiarity with waveform viewers like Verdi or DVE.
  • Good knowledge of scripting languages (Python, Perl, or TCL) for automation.
  • Familiarity with version control and CI/CD systems.

PREFERRED QUALIFICATIONS:

  • Formal verification or emulation experience is a plus.
  • Familiarity with industry-standard protocols like PCIe, USB, DDR, AMBA (AXI/AHB/APB).
  • Prior experience leading a verification team or acting as a verification lead.
  • Exposure to post-silicon bring-up and validation.


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