Urgent Search for Peripheral DV

Job Description- Pre Silicon DV of Peripheral SDIO, UART, SPI, QSPI, WDT, GPT, eUSB and could be other low speed peripherals- Test plan development, Test development, RTL verification- Regression, coverage, use case closure- Support power and performance tests development for same peripherals- GLS and timing simulation of the same

Peripheral DV engineers play a pivotal role in the development of low-speed peripherals.Job DescriptionKey Responsibilities:Pre-Silicon Development: Develop test plans, tests, and RTL verifications for SDIO, UART, SPI, QSPI, WDT, GPT, eUSB, and other similar peripherals. Collaborate with cross-functional teams to ensure seamless integration.Test Plan...

Who are we and what do we do?The HVP team in TI develops power solutions for a wide array of end-equipments, with several hundreds of volts of withstand capability. This team in TI offers one of the world's largest comprehensive portfolios of high-performance AC/DC and isolated DC/DC controllers, GaN-integrated power-stages and converters, and modules with...

Job Requirements Experience 4-8 yrs in Design Verification.Strong SV UVMVerification exp in real projects.Peripheral I/O, Ethernet – ARM SOC-basedExperience in Physical design with block level and familiar with ASIC design flow from synthesis to GDSII. Experience in handling High utilized critical blocks and Congestion mitigationWork very closely with...

About the jobExperience Level - 4+ yearsMandatory Skills - DDR, Ethernet and PCILocation - BangaloreNotice period - Immediate joiner to 30 daysJob Description :Proficient in Design verification is a mustExperience in creating a testplan for the blocks owned, testbench development and the delivery ownership is a mustExperience in ARM based CPU sub-system is a...

Hiring Now – Immediate Joiners Only | Location: Bangalore (Onsite) Requirement 1: Verification Lead/EngineerExperience : 4+ years (Lead: 10+ years)Key Skills :RTL verification of SDIO, UART, SPI, WDT, GPT, eUSB and other low-speed peripheralsStrong in SystemVerilog, UVM , Assertions & CoverageExperience with VCS, Questa, XceliumPower-aware simulation...

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Senior Digital Design Engineer Job DescriptionAbout the Role:This exciting opportunity is for a Senior Digital Design Engineer to join our team. As a key member of the engineering group, you will be responsible for designing and developing digital IP blocks using Verilog and SystemVerilog.The ideal candidate will have a strong understanding of control path...

Hiring Now – Immediate Joiners Only | Location: Bangalore (Onsite) Requirement 1: Verification Lead/Engineer Experience: 4+ years (Lead: 10+ years) Key Skills:- RTL verification of SDIO, UART, SPI, WDT, GPT, eUSB and other low-speed peripherals- Strong in SystemVerilog, UVM, Assertions & Coverage- Experience with VCS, Questa, Xcelium- Power-aware...

Job Responsibilities: Designkey digital blocks such as accelerators/ datapath IP in Verilog/ System Verilog with built-in configurability to allow Power/ Performance/ Area tradeoffs Develop strong understanding of heterogenous processor cores & subsystems (A55/ M55/ M4/ U55/ RISC-V/ DSP core, and associated infrastructure such as caches, interconnect...