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Senior Memory Design Expert
2 weeks ago
We are seeking a skilled Memory Design Engineer to join our team. In this role, you will be responsible for developing memory compilers and memory Fast Cache instances for our next generation Cores, achieving outstanding Performance, Power, and Area (PPA).
The ideal candidate will have a strong understanding of computer architecture concepts, as well as experience with design verification techniques such as sense amplifier analysis, self-time analysis, and marginality analysis.
You will work closely with our team to develop high-speed, low-power CMOS circuit designs, clocking schemes, and complex logic circuits. Additionally, you will have expertise in physical implementation impact on circuit performance and power versus performance versus area trade-offs.
Responsibilities:- Design and develop digital circuits for memory blocks like SRAM, register files, and caches.
- Perform simulations and verification to ensure functionality and optimize for power, performance, area, timing, and yield.
- Minimum 7 years of experience in SRAM/memory design margin, char, and quality checks.
- Strong knowledge of physical implementation impact on circuit performance.
- Good understanding of high-performance and low-power circuit designs with exposure to FinFet technologies.
- Proven experience as the designated responsible individual for a memory design, leading a small team of designers.
- Expected to have good interpersonal skills.
- Some experience working on Cadence or Synopsys flows.
- Experience with circuit simulation and optimization of standard cells.