Advanced Chip Architecture Developer

1 week ago


Anantapur, Andhra Pradesh, India beBeeDesign Full time US$ 1,80,000 - US$ 2,20,000

Lead Complex Chip Architect

Job Description

This position involves the development of complex chip architectures with multi-core, multi-threaded processor subsystems, AI accelerators, interconnects, memory architecture and multi-level caches, multiple clocks and resets, high-speed interfaces, peripherals. The chosen candidate would need to contribute to, and manage a team for, the development of architecture, microarchitecture, and design of chips which include RISC-V, ARM or proprietary processor designs, and high-speed interfaces for off-chip memories, along with the integration of wireless systems, power management, and mixed signal IP. The candidate would be responsible for leading a project through the entire product development process.

Responsibilities
  1. Develop and execute Wireless Chips from definition, through execution, and into production.
  2. Coordinate with cross-functional teams (such as software) on dependencies.
  3. Represent the design community to provide succinct weekly status and attend cross-functional meetings. Drive design action items to closure.
  4. Perform Chip Design Integration and maintain design collateral such as documentation, register libraries, and pinouts delivered to cross-functional teams.
  5. Follow established quality procedures and processes to achieve first tapeout.
  6. Actively support validation and product test teams during silicon bringup, validation, characterization, and qualification.
Required Skills and Qualifications
  • Capable of leading complex IP, SOC development projects execution. Experience coordinating with contractors a plus.
  • Top-down planning and execution of SOC projects.
  • Experience in full-chip development cycle.
  • Able to build strong technical teams.
  • Hands-on experience in architecture, micro-architecture, digital design processes.
  • Knowledge of high-speed interfaces like USB, PCIe, Ethernet, Mobile DDR, Quad/Octa-SPI.
  • Knowledge of peripheral interfaces like SDIO, UART, I2S, I2C, PWM, CAN, etc.
  • Knowledge of processors like RISC-V and ARM processors.
  • Knowledge of design signoff flows including Lint, CDC, Formal Verification, Synthesis, Constraints and STA Timing Closure.
  • Knowledge of DFT including Scan, ATPG, MBIST.
  • Knowledge of low power design methodology (static/dynamic clock gating, power gating, dynamic voltage and frequency scaling).
  • Knowledge of hardware accelerators.
  • Knowledge of Verilog and System Verilog.
  • Knowledge of scripting languages like Perl, Python, Tcl, shell.
Benefits
  • Equity Rewards (RSUs)
  • Employee Stock Purchase Plan (ESPP)
  • Insurance plans with Outpatient cover
  • National Pension Scheme (NPS)
  • Flexible work policy
  • Childcare support


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