Senior Memory PHY Architect
3 weeks ago
We are seeking a highly skilled Senior Memory PHY Architect to join our team at Mulya Technologies. As a key member of our engineering team, you will be responsible for designing and optimizing physical layer interfaces for memory systems.
Key Responsibilities:- Design and optimize physical layer interfaces for memory systems, including DDR, LPDDR, and HBM.
- Collaborate with cross-functional teams to ensure seamless integration and functionality of memory interfaces.
- Interface with customers to understand their requirements and provide technical support during product integration and deployment.
- Identify and mitigate risks associated with memory interfaces, such as timing closure issues or signal integrity issues.
- Architect complex memory interface solutions to meet performance, power, and cost targets.
- Guide and mentor junior engineers to help them solve complex design challenges.
- Develop and maintain design documentation, including specifications, design guidelines, and application notes.
- 13-17 years of experience in Memory PHY designs in lower (7nm and below) tech nodes.
- Deep knowledge of digital and analog design, as well as RTL design, DV, and SI/PI.
- Experience in architecture of PHYs and controllers.
- Ability to drive architecture, customer engagement, and coordination with various teams to drive execution.
- Competitive compensation package.
- Restricted Stock Units (RSUs).
- Hybrid working model.
- Provisions to pursue advanced education from premium institutes.
- Medical insurance and wellness benefits.
- Educational assistance.
- Advance loan assistance.
- Office lunch and snacks facility.
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