Visionary Low Power Design Leader

12 hours ago


Aurangabad, Maharashtra, India beBeeLowPowerEngineer Full time ₹ 18,00,000 - ₹ 25,00,000
Senior Physical Design Engineer

We are seeking a highly skilled Senior Physical Design Engineer to join our team. As a key member of our design team, you will be responsible for leading top-level floor planning, partitioning, placement, scan-chain-reordering, clock tree synthesis, timing optimization, SI aware routing, timing analysis/closure, and ECO tasks (timing and functional ECOs), SI closure, design rule checks (DRC), and Logical vs. Schematic (LVS) checks, Antenna checks.

  • Work on advanced low power techniques such as Voltage Islands, Power Gating, and substrate-bias in 65nm or lower node designs.
  • Provide technical guidance and mentoring to Physical Design Engineers.
  • Interface with front-end ASIC teams to resolve issues.
  • Deliver Low Power Design using Voltage Islands, Power Gating, Substrate-bias techniques.
  • Achieve Timing closure on DDR2/DDR3/PCIE interfaces.
  • Utilize extensive experience and detailed knowledge in Cadence or Synopsys or Magma physical Design Tools.
  • Expertise in scripting languages such as PERL, TCL.
  • Develop strong Physical Verification skill set.
  • Perform Static Timing Analysis in Primetime or Primetime-SI.
Requirements:

Experience: 3-12 Years

Location: Aurangabad, India



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