Digital Design Verification Lead
3 weeks ago
About this role
Analog Devices is seeking a highly skilled Digital Design Verification Lead to join our Central Digital IP team. As a Digital Design Verification Lead, you will be responsible for providing technical leadership to the DV team, managing IP development and delivery, and interacting with internal customers to communicate, identify, improve, and maintain developed IP.
Key responsibilities
- Verification of complex designs such as accelerators/datapath IP, processor core subsystems, complex interfaces/protocols such as DDR/Ethernet/USB etc using leading edge methodologies like UVM & Formal DV
- Create verification strategies and influence the decisions on methodologies to be adopted for the verification at block and sub-system level
- Architect the testbench and develop the verification environment in UVM and Formal based verification approaches
- Define testplan, tests and verification methodology for block / sub-system level verification. Work with design team in generating test-plans and closure of code and functional coverage.
- Integrate the block testbench at sub-system level UVM environment and verify integration. Interact with analog co-sim and firmware team in enabling toplevel chip verification aspects
- Packaging verification environment for Digital IP for seamless integration into verification flow at different stages of execution
- Technically mentor and lead a team of verification engineers
- Conduct detail-oriented DV reviews and drive adherence to quality metrics
- Evaluate 3rd party IPs on key qualitative aspects such as design quality, robustness of Design Verification (DV) practice, ease of DV environment integration and make recommendations
- Build deep expertise on complex interfaces , peripherals & protocols such as DDR, Ethernet, eMMC/ SD, MIPI, Display Port, HDMI, PCIe, high speed D2D
- Support post-silicon verification/validation activities of the products working with design, product evaluation and applications engineering team
- Drive efforts towards development of Design Management and IP Centric infrastructure and flows across different tools such as Methodics / Perforce / Github / IP catalog creation etc
- Establish evaluation flows for home-grown & 3rd party IPs for consistent benchmarking of evaluation
- Manage & streamline efforts towards consolidation/ curation of digital IP blocks , such as standard peripherals, processor cores & collaterals, high speed protocol & interface IP
- Strive to remove complexity and ambiguity within the teams and their processes. Ability to distil and provide clear and actionable recommendations to the team
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