
Digital Verification Specialist
2 days ago
A leading-edge verification methodology is required to bridge the physical and digital worlds, enabling breakthroughs at the Intelligent Edge.
About the Role
- Complex ASIC chips and sub-systems verification using advanced methodologies
- Define test plans, tests, and verification methodology for block and chip level verification
- Employ UVM/SystemVerilog based verification methodologies and use scoreboard, assertions, functional/code coverage, formal verification, etc., to reach verification goals
Key Responsibilities
- Own a complex feature verification project and mentor junior verification engineers
- Develop improvements in verification flow and methodology
- Gate-level simulations and debug of large digital blocks and full-chip ASICs
- Support post-silicon validation activities of products working with design, applications, and test team
Requirements
- Bachelor's or Master's degree in Electrical or Computer Engineering with 7+ years of experience in digital verification
- Expertise in Verilog, System Verilog, UVM, object-oriented programming, scripting, and automation with Perl or Python
- Firm understanding of constrained random functional verification, coverage, and assertions
This is an exciting opportunity to develop next-generation high-speed SerDes technology required for tomorrow's advanced software-defined vehicles (SDV).
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