
Senior ASIC Verification Specialist
11 hours ago
We are seeking an experienced ASIC Design Verification Engineer to join our team. As a key member of the verification team, you will be responsible for developing and executing test plans to verify complex ASIC designs.
- Develop and execute test plans to verify complex ASIC designs using System Verilog (SV) and UVM methodologies.
- Perform functional, formal, GLS (Gate-Level Simulation), power, and CPU verification.
- Conduct IP and subsystem-level verification, ensuring robust verification of high-speed protocols.
- Work closely with RTL designers to understand design specifications and requirements.
- Write and maintain C/C++ test benches for verification environments.
- Perform coverage analysis and drive coverage closure.
- Debug issues found during verification and work with design teams to resolve them.
- Participate in design and verification reviews, providing insights and suggestions for improvements.
The ideal candidate will have a degree in Electrical Engineering, Computer Engineering, or a related field and a minimum of 3 years of experience in ASIC design verification. Proficiency in System Verilog, UVM, and C/C++ is also required.
Additionally, the candidate should have knowledge of functional, formal, GLS, power, and CPU verification methodologies, as well as experience with high-speed protocols and IP verification.
BenefitsTessolve offers a competitive salary and benefits package, opportunities to work on cutting-edge technology and projects, professional development and career advancement opportunities, and a collaborative and innovative work environment.
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