Senior Technical Lead

1 day ago

Anand, Gujarat, India beBeeVerification Full time ₹ 40,00,000 - ₹ 50,00,000
Job Opportunity

We are seeking a Technical Lead to manage end-to-end technical initiatives, projects, and teams within the Design Verification domain.

The ideal candidate will have extensive experience in ASIC/SoC Design Verification, with strong expertise in SystemVerilog, UVM-based testbench development, coverage closure, debugging, and verification methodologies.

Key Responsibilities:
  • Develop and implement verification strategies, test plans, coverage goals, and closure metrics.
  • Provide technical guidance on SystemVerilog, UVM, SVA, and coverage-driven verification.
  • Collaborate with architects, designers, and DV engineers to drive project execution.
  • Manage multi-site DV teams, track progress, and mitigate risks through proactive planning.
  • Conduct status reporting, milestone reviews, and stakeholder interactions.
  • Mentor junior engineers and ensure adherence to best practices in verification and project management.
Required Skills & Qualifications:
  • 14 to 20+ years of experience in Design Verification (IP / Subsystem / SoC level).
  • Strong expertise in SystemVerilog, UVM, SVA, and coverage-driven verification.
  • Hands-on knowledge of AMBA protocols (AXI, AHB, APB) and Memory/DRAM verification flows.
  • Experience with Gate Level Simulation (GLS), Low Power (UPF), and Formal Verification is a strong plus.
  • Exposure to EDA tools such as Cadence Xcelium, Synopsys VCS, and Verdi.
  • Proven experience in project/program management, leading DV teams (10+ engineers).
  • Strong stakeholder management, planning, and execution skills.
Benefits:
  • Opportunity to work on cutting-edge memory and SoC verification projects.
  • Lead high-impact DV programs with global exposure.
  • Fast-track hiring process for immediate joiners.
  • Collaborate with a technically strong, innovative team.

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