Senior Design Verification Engineer

4 weeks ago


Delhi, Delhi, India Eximietas Design Full time
Job Title: Senior Design Verification Engineer

We are seeking an experienced and highly skilled Senior Design Verification Engineer to join our team at Eximietas Design. As a key member of our team, you will play a pivotal role in ensuring the robustness and correctness of our cutting-edge System on Chip designs.

Key Responsibilities:
  • Lead and manage Design Verification efforts for complex projects, ensuring the successful execution of verification plans.
  • Develop and implement comprehensive verification strategies, test plans, and test benches for high-speed protocols like PCIe, Ethernet, CXL, MIPI, DDR, and HBM.
  • Conduct Gate-level simulations, and power-aware verification using Xprop and UPF.
  • Analyze and implement System Verilog assertions and coverage (code, toggle, functional).
  • Provide mentorship and technical guidance to junior verification engineers.
  • Manage and lead a dynamic team of verification engineers, fostering a collaborative and innovative work environment.
  • Ensure verification signoff criteria are met and documentation is comprehensive.
Requirements:
  • Bachelor's degree in computer science, Electrical/Electronics Engineering, or related field.
  • 4+ years of hands-on experience in Design Verification.
  • Expertise in UVM (Universal Verification Methodology) and System Verilog.
  • Prior experience working on IP level and SOC level verification projects.
  • Proficient in verification tools such as VCS, Xsim, waveform analyzers, and third-party VIP integration.
  • Hands-on experience with UFS (Universal Flash Storage), Ethernet, PCIe, CXL, MIPI protocols.
Preferred Qualifications:
  • Master's degree in computer science, Electrical/Electronics Engineering, or related field.
  • PhD in Computer Science, Electrical/Electronics Engineering, or related field.
  • Experience with DDR, HBM, Gate-level simulations, and power-aware verification using Xprop and UPF.
  • Proficiency in scripting languages such as shell, Makefile, and Perl.
  • Strong understanding of processor-based SOC verification, including native, Verilog, System Verilog, and UVM mixed environment.

We offer a dynamic and innovative work environment, with opportunities for growth and development. If you are a motivated and experienced Senior Design Verification Engineer looking for a new challenge, please submit your application.



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